Junior Layout Engineer (Analog IC)

TL;DR

Junior Layout Engineer (Analog IC): Developing and delivering high-impact microcontrollers (MCU) and analog custom products for AI at the Edge with an accent on physical implementation and floorplanning. Focus on running physical verifications (DRC/LVS/DFM) and ensuring long-term reliability and zero-defect designs.

Location: Catania, Italy (Onsite)

Company

World leader in secure connectivity solutions for embedded applications, specializing in automotive, industrial, IoT, and mobile markets.

What you will do

• Deliver floorplan activities and physical implementation of analog blocks at the IP level.
• Design and deliver analog layout blocks, managing signal distribution and power supply strategies.
• Perform all physical verifications including DRC, LVS, DFM, and parasitic extractions to ensure high quality.
• Participate in design reviews, create technical documentation, and support product integration.
• Ensure a strong focus on design for quality to achieve long-term reliability and zero defects.
• Provide technical training and develop technical guidelines based on layout expertise.

Requirements

• 0-2 years of experience in Analog layout activities for complex ICs.
• Degree in Electrical Engineering (MSEE/BSEE) or a working equivalent.
• Knowledge of device physics and IC ESD protection strategies.
• Proficiency with layout design tools such as Cadence Virtuoso (OA, PVS) and Mentor Graphics (Calibre).
• Ability to collaborate with cross-functional global teams.
• Excellent communication skills for operating in a global environment.

Culture & Benefits

• Professional growth through diverse online and offline learning opportunities.
• Inclusive work environment focused on diversity, equality, and zero tolerance for discrimination.
• Opportunity to work on world-class products within a fast-paced consumer electronics environment.
• Commitment to sustainability and measurable year-on-year environmental progress.