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3 дня назад

Senior Staff Design Verification Engineer (DDR/LPDDR/HBM)

134 390 - 201 300$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

Senior Staff Design Verification Engineer (Memory Sub-System): Designing and verifying high-speed memory interfaces for advanced custom chips with an accent on UVM/SystemVerilog-based environments. Focus on protocol-level verification, coverage-driven verification (CDV), and solving complex simulation failures to ensure first-pass-right silicon.

Location: Santa Clara, CA

Salary: $134,390 - $201,300 per annum

Company

hirify.global provides semiconductor solutions that serve as essential building blocks for data infrastructure across enterprise, cloud, AI, and carrier architectures.

What you will do

  • Develop and execute verification plans for high-speed memory interfaces including DDR4/DDR5, LPDDR4/LPDDR5, and HBM2/HBM3.
  • Build and enhance UVM and SystemVerilog-based verification environments.
  • Develop test benches, sequences, and checkers for functional and performance validation.
  • Perform protocol-level verification for memory controllers and PHY interfaces.
  • Analyze and debug simulation failures to identify root causes and drive resolution.
  • Collaborate with design, architecture, and firmware teams to ensure coverage closure and specification compliance.

Requirements

  • Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • 5-10 years of experience in ASIC/SoC verification.
  • Strong knowledge of DDR, LPDDR, or HBM protocols and architecture.
  • Expertise in SystemVerilog and UVM methodology.
  • Experience debugging complex verification issues and familiarity with industry-standard simulation tools.
  • Must be eligible to access export-controlled information as defined under applicable U.S. law.

Nice to have

  • Knowledge of JEDEC standards for DDR/LPDDR/HBM.
  • Experience with assertion-based verification (SVA).
  • Exposure to emulation platforms such as Palladium or Veloce.
  • Scripting skills in Python, Perl, or Shell.
  • Experience with low-power verification (UPF).

Culture & Benefits

  • Employee stock purchase plan with a 2-year look back.
  • Comprehensive family support programs to balance work and home life.
  • Robust mental and physical health resources.
  • Recognition and service awards to celebrate professional milestones.

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