IC Design Verification Engineer (SoC)

TL;DR

IC Design Verification Engineer (SoC/UVM): Designing and verifying breakthrough Ethernet and networking IP for next-generation SoCs with an accent on UVM verification and hardware IP architecture. Focus on building directed and random verification tests, debugging test failures, and optimizing coverage metrics to ensure high-quality silicon.

Location: Kanata, Canada

Company

hirify.global is a global leader in secure connectivity solutions for embedded applications, specializing in automotive, industrial, and IoT markets.

What you will do

• Architect and implement UVM Verification for hardware IP and System on Chip (SoC) products.
• Develop and execute directed and random verification tests for advanced networking IP.
• Perform detailed trade-off analysis on performance and complexity.
• Debug test failures to determine root causes and collaborate with architects to resolve defects.
• Review functional and code coverage metrics and modify tests to meet requirements.
• Create high-quality documentation, including functional and implementation specifications.

Requirements

• 5+ years of experience in IP and SoC products.
• Expertise in SystemVerilog and UVM Verification.
• Proficiency in EDA tools and scripting languages such as Python, TCL, Perl, and Shell.
• Experience with revision control systems like Git.
• Bachelor's degree in Computer Science, Engineering, or a related field.

Nice to have

• Familiarity with Formal and Functional Safety Verification.
• Knowledge of TCP/IP protocols and state-of-the-art networking technologies.
• Experience with data products including routers, bridges, and switches.
• Knowledge of security and cryptography.

Culture & Benefits

• Extensive online and offline learning opportunities for professional and core skill development.
• Inclusive work environment with a strong commitment to diversity, equality, and sustainability.
• Opportunity to work on high-impact IP cores used in automotive and industrial markets.