Senior Analog Layout Manager (Semiconductor)

TL;DR

Senior Analog Layout Manager (Semiconductor): Leading a team of layout designers to develop High-Speed SerDes (HSS) and Analog Mixed-Signal IPs with an accent on macro level layout, schedule management, and risk assessment. Focus on scaling the San Diego design organization, optimizing FinFET processes, and ensuring tape-out quality.

Location: San Diego, CA

Salary: $138,200 - $204,460 per annum

Company

hirify.global is a semiconductor solutions provider creating essential building blocks for data infrastructure across enterprise, cloud, and AI.

What you will do

• Hire and lead a team of analog layout designers.
• Assess schedules, floor plans, and risks for digital macros.
• Perform hands-on work at the macro level layout.
• Manage and track layout schedules and prioritize project tasks.
• Collaborate with CAD, technology, and circuit design teams to synchronize layout with overall project plans.
• Communicate complex layout design concepts cross-functionally.

Requirements

• 10+ years in analog layout design and 3+ years in management.
• Deep understanding of layout methodology from initial chip planning to tape-out.
• High proficiency in LVS, DRC debugging, and interpreting CALIBRE reports.
• Proficiency in Synopsys or Cadence layout entry tools.
• Must be eligible to access export-controlled information as defined under U.S. export control laws (EAR).

Nice to have

• Experience with advanced process technology and FinFET.
• Programming skills in Skill, Ample, or Perl.

Culture & Benefits

• Employee stock purchase plan with a 2-year look back.
• Comprehensive family support programs.
• Robust mental and physical health resources.
• Recognition and service awards for contributions and milestones.