Design Verification Engineer (Mixed-Signal)

TL;DR

Design Verification Engineer (Mixed-Signal): Supporting the functional verification of industry-leading mixed-signal products with an accent on pre-silicon verification and post-silicon validation. Focus on testbench creation, failure analysis, and digital/mixed-signal modeling.

Location: Hybrid (Chandler, Arizona). Must be based within commutable distance or be willing to relocate to Chandler, Arizona

Company

hirify.global is a leader in mixed-signal processing, creating innovative solutions for the world's top consumer brands.

What you will do

• Assist in verification planning and strategy development.
• Support the creation, maintenance, and enhancement of testbenches.
• Contribute to failure analysis, debug, and resolution efforts.
• Perform coverage analysis to ensure thorough verification of mixed-signal products.
• Develop digital/mixed-signal models and directed/constraint-random test generation.

Requirements

• Currently pursuing a MS or PhD in Electrical Engineering or a related field.
• Strong background in Hardware Description Languages (HDLs) such as Verilog or VHDL.
• Familiarity with Hardware Verification Languages (HVLs) like SystemVerilog/UVM, Vera, or e.
• Solid understanding of digital design fundamentals and verification methodologies.
• Must be able to access technical data without an export license (candidates from certain embargoed countries may be prohibited).

Culture & Benefits

• Award-winning culture built on inclusion, fairness, and meaningful community engagement.
• Focus on delivering enjoyable employee experiences.
• Hybrid work environment, though interns may be required in-office up to 5 days per week based on business needs.