Analog Layout Staff Engineer (Semiconductor)

TL;DR

Analog Layout Staff Engineer (Semiconductor): Designing and verifying high-speed or precision analog circuits as part of the Central Engineering group with an accent on floorplanning, layout, and full development cycle. Focus on developing high-level macros and full interfaces for data infrastructure solutions.

Location: Pavia, Italy

Company

hirify.global provides essential semiconductor solutions for data infrastructure across enterprise, cloud, AI, and carrier architectures.

What you will do

• Run simulations and verifications using Cadence Virtuoso to refine and debug designs iteratively.
• Manage the full development cycle, including floorplan, layout, verification, delivery, and support.
• Collaborate closely with designers and global teams across Argentina, Singapore, the U.S., and Europe.
• Act as a technical mentor and key contributor within the layout and broader project teams.
• Develop a range of components from individual cells and functional blocks to higher-level macros and full chips.

Requirements

• Degree in Electrical Engineering (graduate or undergraduate).
• Proficiency in CAD tools for microelectronic layer implementation.
• Track record of delivering high-speed or precision analog circuits, preferably across multiple process nodes.
• Experience with full ownership of the design lifecycle from floorplanning to support.
• Excellent communication skills for presenting updates to global teams across different time zones.
• Must be eligible to access export-controlled information under U.S. export control laws (EAR).

Culture & Benefits

• Competitive compensation and comprehensive benefits package.
• Collaborative, transparent, and inclusive work environment.
• Access to tools and resources designed for professional growth and development.
• Opportunity to work on cutting-edge technologies within a global team structure.