Physical Design Engineer for Core IP (CPU)

TL;DR

Physical Design Engineer for Core IP (CPU): Designing the latest core IP for compute processors across client, server, IOTG, and AI with an accent on power efficiency and RTL to GDS implementation. Focus on conducting synthesis, place and route, clock tree synthesis, and signoff verification to optimize power, frequency, and area.

Location: On-site in Hillsboro, Oregon, US

Salary: $122,440.00-232,190.00

Company

hirify.global's Silicon and Platform Engineering Group delivers breakthrough silicon and platform solutions for next-generation computing experiences.

What you will do

• Perform physical design implementation of custom CPU designs from RTL to GDS.
• Conduct the full physical design flow: synthesis, place and route, clock tree synthesis, and floor planning.
• Execute verification and signoff, including formal equivalence, STA, DRC/LVS, and power integrity analysis.
• Collaborate with logic, circuit, and architecture teams to optimize CPU microarchitectures.
• Work with EDA vendors to enhance tool capabilities for high-speed, low-power synthesizable CPUs.
• Optimize product-level parameters including power, frequency, and area.

Requirements

• Bachelors in Computer or Electrical Engineering with 3+ years of experience, or M.S./PhD with 2+ years of experience.
• Proficiency with integrated circuit design tools (Synopsys/Cadence), including logic synthesis and P&R.
• Experience in PV convergence and physical design verification (DRC/LVS, Noise, and electro-migration checks).
• Scripting skills in TCL and at least one other language (e.g., Python, Perl, Ruby).
• Experience in synthesis of digital logic blocks integrated into large SoCs or IP.
• Must be able to work on-site in Hillsboro, Oregon

Nice to have

• Knowledge of best practices in floor-planning, routing techniques, and clock distribution.
• Experience with advanced Static Timing Analysis, Noise analysis, and reliability verification.
• Expertise in RTL to GDS methodologies and formal equivalence.

Culture & Benefits

• Competitive pay and stock bonuses.
• Comprehensive health and retirement programs.
• Paid vacation and industry-leading total compensation package.
• Focus on cutting-edge innovation in microprocessor architecture.