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18 часов назад

SOC Design Verification Engineer

164 470 - 311 890$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

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TL;DR

SOC Design Verification Engineer: Verify integrated System-on-Chip (SoC) designs at block, subsystem, and full-chip levels with an accent on functional logic verification, scalable testbenches, and coverage closure. Focus on debugging presilicon issues, integrating security features, and analyzing post-silicon insights to improve methodologies.

Location: Hybrid work model - split time between on-site at assigned hirify.global sites (US, California Santa Clara primary; additional: Folsom CA, Fort Collins CO, Hillsboro OR) and off-site.

Salary: $164,470 - $311,890

Company

Semiconductor leader in Data Center Group delivering Xeon-based and custom x86 solutions for compute, web services, HPC, and AI-accelerated systems.

What you will do

  • Conduct functional verification of SoC designs to meet specifications.
  • Develop reusable verification plans, testbenches, and environments for blocks, subsystems, and full SoC.
  • Execute plans using emulation and simulation, analyze performance, and uncover bugs.
  • Debug presilicon issues, identify root causes, and implement fixes.
  • Collaborate with architects and RTL developers on complex features and technical reviews.
  • Integrate security into test plans and improve verification infrastructure.

Requirements

  • Bachelor's in Electrical Engineering, Computer Science or related + 8+ years experience (or Master's +6, PhD +4).
  • Proficiency in OVM/UVM and SystemVerilog constrained random verification.
  • Experience developing/executing verification test plans, debugging, and coverage closure.
  • Proficiency in scripting for automation.

Nice to have

  • Experience with security, coherency, or SoC verification.
  • Extensive design/verification for complex IPs/SoCs.
  • Xeon CPU pre/post-silicon validation.
  • Expertise in cache coherency and layered protocols.

Culture & Benefits

  • Competitive pay, stock bonuses, health, retirement, and vacation benefits.
  • Hybrid work model with on-site and off-site flexibility.
  • Shift 1 (United States of America).

Hiring process

  • Application window ends April 30, 2026.
  • Recruiter discusses specific compensation for preferred location.

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