Principal Analog Mixed-Signal IC Design Engineer

TL;DR

Principal Analog Mixed-Signal IC Design Engineer (CMOS/SERDES): Designing highly sophisticated CMOS transceiver/SERDES products with an accent on architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs. Focus on meeting key performance targets, performing design verification, carrying out layout activities in nanometric technologies, lab characterization, debugging, validation, and interfacing with digital and SOC teams.

Location: Singapore (onsite, full-time). This position may require access to U.S. export-controlled technology; applicants must be eligible under applicable U.S. export laws (U.S. citizens, permanent residents, or protected individuals preferred).

Company

hirify.global’s semiconductor solutions are essential building blocks of data infrastructure connecting enterprise, cloud, AI, and carrier architectures.

What you will do

• Design architectural investigations and implement analog/mixed-signal circuits including PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs.
• Meet key performance targets and perform design verification using SPICE, Spectre, MATLAB.
• Carry out layout activities in nanometric technologies and supervise physical design.
• Work in the lab to characterize, debug, and validate designs independently or with test engineers.
• Generate design documents, application specifications, and support customers/FAEs as needed.
• Interface with digital and SOC teams for design integration and cross-functional verifications.

Requirements

• Strong knowledge of deep sub-micron CMOS technologies.
• Hands-on experience designing mixed-signal circuits: ADCs, DACs, RX, TX, PLLs, filters, bandgap bias, regulators.
• Knowledge of low-power and high-speed design techniques.
• Strong problem-solving and analytical skills.
• Proficiency in IC design CAD tools: Spectre, SPICE, MATLAB, Hsim, Verilog.
• Lab testing skills for prototype evaluation.
• Bachelor’s in Electrical Engineering or related + 10-15 years experience (Master’s/PhD + 5-10 years).

Culture & Benefits

• Competitive compensation and great benefits in a collaborative, transparent, inclusive environment.
• Tools and resources for success, growth, and development.
• Part of Central Engineering hub impacting Automotive, Storage, Security, Networking.
• Opportunity to learn multiple engineering aspects and dive deep into specialization.