RISC-V Architect (AI)

TL;DR

RISC-V Architect (AI): Designing and optimizing the frontend of RISC-V CPU cores for a next-gen AI platform with an accent on performance modeling and microarchitecture. Focus on analyzing AI workloads to eliminate bottlenecks and co-designing a unified hardware-software stack.

Location: Hybrid; must be based in Toronto, ON or Austin, TX

Company

hirify.global is building a high-performance AI platform centered on scalable RISC-V processors to revolutionize computing performance and efficiency.

What you will do

• Analyze AI workloads to identify CPU performance requirements and bottlenecks.
• Architect custom RISC-V CPU cores optimized for performance, power, and area.
• Design custom instructions that improve performance without sacrificing programmability.
• Collaborate across compilers, software, and hardware teams to co-design the next-gen compute architecture.

Requirements

• Over 10 years of experience in CPU performance modeling and microarchitecture.
• Proficiency in C++ and Python, with a strong understanding of the RISC-V instruction-set.
• Well versed in compiler design and the impact of software stacks on CPU performance.
• Familiarity with open-source RISC-V cores and LLVM toolchains.
• Must be eligible to access U.S. export-controlled technology (EAR compliance).

Culture & Benefits

• Highly competitive compensation package and benefits.
• Collaborative environment focused on solving hard technical problems.
• Opportunity to shape the core CPU architecture of a leading AI platform.