Principal Static Timing Analysis Engineer (IoT)

TL;DR

Principal Static Timing Analysis Engineer (IoT): Developing timing constraints and ensuring timing closure for low-power wireless SoCs and IP systems with an accent on complex, deeply gated clock networks and asynchronous clock sources. Focus on evolving static timing analysis flows, driving rapid timing closure through advanced scripting, and integrating AI-powered tools to optimize productivity and performance.

Location: Must be based in or able to commute to Austin, TX (Hybrid)

Salary: $160,650–$298,350

Company

hirify.global is a leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives.

What you will do

• Develop and refine timing constraints at both IP and SoC levels.
• Evolve existing static timing analysis (STA) flows and methodologies.
• Establish comprehensive timing signoff criteria including aging, OCV, and signal integrity.
• Utilize scripting techniques to analyze reports and drive rapid timing closure.
• Collaborate with global design teams and multi-functional units to resolve complex timing issues.
• Drive timing closure for mixed-signal IP integration.

Requirements

• 15+ years of relevant industry experience.
• Bachelor or Master’s degree in Electrical or Computer Engineering.
• In-depth knowledge of timing closure flows, modes, corners, and low-power design methodologies.
• Hands-on experience with industry-standard static timing tools such as Tempus or Primetime.
• Proficiency in scripting languages: Perl, Python, Tcl, and shell.
• Strong background in Verilog and SystemVerilog, with familiarity in AI-powered design tools.

Culture & Benefits

• Comprehensive medical, dental, and vision insurance with HSA/PPO options.
• Competitive 401k match, Roth plan options, and equity (RSUs).
• Flexible PTO schedule and 3 paid volunteer days per year.
• Tuition reimbursement and adoption assistance.
• Onsite gym, free downtown parking, and monthly wellness offerings.