Staff Analog Layout Engineer (Semiconductor)

TL;DR

Staff Analog Layout Engineer (Semiconductor): Contributing to a central engineering team, responsible for analog layout, simulations, and verifications using Cadence Virtuoso. Focus on collaborating with designers to refine and debug high-speed or precision analog circuits and ensure design specifications are met across global teams.

Location: Singapore, Argentina, the U.S., and Europe.

Company

hirify.global’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.

What you will do

• Run simulations and verifications using Cadence Virtuoso.
• Collaborate closely with designers to refine and debug iteratively until the design meets specifications.
• Participate in routine meetings as a technical mentor and layout team member.
• Provide updates on progress and present specific issues or solutions encountered during development.

Requirements

• Fundamental understanding of electrical concepts, likely acquired through a degree in Electrical Engineering.
• Knowledge of how to use CAD tools to do the implementation layers, microelectronic layers in design that go beyond the schematics.
• Track record of delivering high-speed or precision analog circuits, preferably in multiple process nodes.
• Ownership through the full development cycle: floorplan, layout, verification, delivery, and support.
• Excellent communication skills to give status updates to your team and present to global teams.

Culture & Benefits

• Enjoy a workstyle within an environment of shared collaboration, transparency, and inclusivity.
• Access to the tools and resources needed to succeed and grow within the company.
• Great benefits and competitive compensation.