Esd Engineer

TL;DR

ESD Engineer (I/O): Responsible for I/O library development, including the design, simulation, characterization, and validation of I/O pad libraries. Focus on defining the ESD methodology, specifying chip and IP level ESD requirements, and designing ESD protection devices and circuits.

Location: Austin, Texas / Edinburgh, Scotland. Must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.

Company

hirify.global solves complex challenges with innovative end-user solutions for the world's top consumer brands.

What you will do

• Design, simulate, and optimize I/O circuits and ESD structures.
• Characterize and model I/O libraries to support mixed-signal design flow.
• Release and maintain I/O libraries and models.
• Drive ESD sign-off methodology for chip & block-level projects.
• Provide technical leadership to integrate new & existing methodologies to tie ESD-Latch up-IO methodologies together.

Requirements

• MSc EE and relevant proven experience.
• Holistic view of ESD/EOS protection for mixed-signal CMOS circuits.
• Strong fundamentals in ESD circuit design, layout and testing.
• Relevant experience in IO design, including CMOS circuit design, ESD and latch-up requirements, physical verification, and characterization.
• Chip-level ESD signoff experience.
• Must understand layout and be able to guide layout engineers.
• Proficiency with Cadence schematic capture, layout, and simulation tools.
• Ability to work independently and lead or be part of a technical team.
• Effective oral and written communication.

Nice to have

• Experience in IBIS model generation is a plus.

Culture & Benefits

• Award-winning culture built on a foundation of inclusion and fairness.
• Meaningful community engagement.
• Enjoyable employee experiences.