ASIC Design Engineer II (Machine Learning Acceleration)

TL;DR

Asic Design Engineer II (AI): Responsible for the design and optimization of hardware in AWS Machine Learning servers with an accent on high performance, area and power-efficient RTL designs. Focus on optimizing trade-offs between features, power consumption, performance, and area requirements.

Location: USA, CA, Cupertino

Salary: 165,200.00 - 223,600.00 USD annually

Company

Amazon’s culture empowers Amazonians to deliver the best results for their customers.

What you will do

• Develop and implement high-performance, area and power-efficient RTL designs to meet project specifications and targets
• Conduct in-depth analysis of designs, microarchitectures, and architectures to optimize trade-offs between features, power consumption, performance, and area requirements
• Create microarchitectures, implement SystemVerilog RTL, and deliver synthesis and timing-clean designs with appropriate constraints
• Execute lint and clock domain crossing quality checks to ensure design integrity
• Collaborate closely with cross-functional teams, including architects, fellow designers, verification specialists, pre- and post-silicon validation teams, and synthesis, timing, and back-end experts

Requirements

• Bachelor's degree or equivalent
• 3+ years of non-internship design or architecture experience

Preferred Qualifications

• Master's degree in computer science or equivalent
• 3+ years of full software development life cycle experience

Culture & Benefits

• Inclusive culture with employee-led affinity groups
• Focus on work-life balance with flexibility in working hours
• Dedicated to supporting new members with knowledge sharing and mentorship
• Comprehensive benefits including health insurance, 401(k) matching, paid time off, and parental leave