ΠΡΠ° Π²Π°ΠΊΠ°Π½ΡΠΈΡ Π² Π°ΡΡ ΠΈΠ²Π΅
ΠΠΎΡΠΌΠΎΡΡΠ΅ΡΡ ΠΏΠΎΡ ΠΎΠΆΠΈΠ΅ Π²Π°ΠΊΠ°Π½ΡΠΈΠΈ βΠΎΠ±Π½ΠΎΠ²Π»Π΅Π½ΠΎ 15 Π΄Π½Π΅ΠΉ Π½Π°Π·Π°Π΄
Principal IC Digital Implementation AE (EDA)
123Β 200 - 228Β 800$
ΠΠΏΠΈΡΠ°Π½ΠΈΠ΅ Π²Π°ΠΊΠ°Π½ΡΠΈΠΈ
Π’Π΅ΠΊΡΡ:
TL;DR
Principal IC Digital Implementation AE: Providing technical support to customers in backend digital design implementation and signoff with an accent on Place and Route, Design Closure, and timing/power signoff. Focus on enhancing tools and methodologies to meet customerβs requirements and driving adoption of technologies.
Location: San Jose, CA
Salary: $123,200 to $228,800
Company
hires and develops leaders and innovators who want to make an impact on the world of technology.
What you will do
- Provide technical support to customers in Backend Digital Design Implementation and Signoff.
- Guide customers on utilizing technologies to achieve their design goals and meet project schedules.
- Collaborate with team to conduct technical presentations and product demonstrations.
- Drive technical evaluations/benchmarks to success.
- Work with R&D to enhance tools and methodologies to meet customer requirements.
- Provide guidance to the team to amend & augment the flow as needed using Tcl and/or other programming skills.
Requirements
- 10+ years of industry Physical Design experience
- BS degree Computer Science/Engineering, Electrical, Engineering, or related field
- Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis.
- Prior experience with IC digital implementation flows and backend EDA tools including Place and Route, IR Drop, backend design timing and power closure
- Experience with advanced nodes 10nm and below
- Experience in scripting languages such as Tcl/Perl/Python
- Strong customer-facing communication and problem-solving skills
Nice to have
- MS degree Computer Science/Engineering, Electrical, Engineering, or related field
- Prior experience with IC digital implementation flows and font-end EDA tools including Synthesis, DFT, and Logical Equivalence Checking
- Prior experience with tools such as Genus, Innovus, Conformal, Tempus, Modus, Voltus or ICC, ICC2, DC or Primetime is highly desired
- Experience with advanced nodes 5nm and below
Culture & Benefits
- Paid vacation and paid holidays
- 401(k) plan with employer match
- Employee stock purchase plan
- A variety of medical, dental and vision plan options
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