Principal DSP Engineer (Semiconductor)

TL;DR

Principal DSP Engineer (Semiconductor): Designing and simulating DSP architectures and defining specifications for analog and digital designers with an accent on equalization techniques, timing synchronization, and error control coding. Focus on researching digital signal processing for Base-T, SerDes, and optical channels, and developing behavioral models for mixed-signal circuit designs.

Location: Onsite in Santa Clara, CA

Salary: $154,240–$231,000 per annum

Company

hirify.global is a product company providing semiconductor solutions for data infrastructure across enterprise, cloud, AI, and carrier architectures.

What you will do

• Design and simulate DSP architectures, defining key capabilities and performance requirements.
• Create DSP and FEC hardware block specifications appropriate for RTL implementation.
• Perform research activities in digital signal processing for various channels (Base-T, SerDes, optical).
• Work with designers to ensure efficient circuit architecture implementation.
• Develop/perform behavioral modeling of mixed-signal circuit designs for transceivers.
• Provide guidance on test plans for lab characterization and participate in chip lab bring up.

Requirements

• Ph.D. or M.S. in Electrical Engineering, Computer Science or related fields with 3+ years of related design experience.
• Strong knowledge of communications theory and system design, and digital signal processing.
• Proficient in C/C++ and Matlab or Python.
• Work authorization: Applicants must be eligible to access export-controlled information under U.S. export control laws and regulations. Except for U.S. citizens, lawful permanent residents, or protected individuals, all applicants may be subject to an export license review process prior to employment.

Nice to have

• Familiarity with Ethernet systems.
• Experience in high-speed DSP, especially FFE/DFE, Clock and Data Recovery (CDR) or FEC (RS, soft decoding, Viterbi algorithm).
• Experience with ADC-based wireline transceivers and/or coherent DSP architectures.
• Experience with high-speed/time interleaved ADC and associated calibration algorithms.

Culture & Benefits

• Comprehensive total compensation package including base, bonus, and equity.
• Health and financial wellbeing benefits, including 401k.
• Flexible time off, year-end shutdown, floating holidays, and paid time off to volunteer.
• Interviews are designed to assess personal experience, thought process, and communication skills in real-time, with a strict policy against using AI tools.