Senior / Principal Digital IC Design Engineer

Location: Finland, Estonia or the EU. Hybrid work is available through offices in Tampere, Helsinki, Turku and Oulu; remote work is available for the Estonia-based team and, through a consultancy arrangement where suitable, elsewhere in the EU.

Monthly salary for employment in Finland and Estonia is agreed based on role scope, competence and experience. Consultants may provide an expected rate.

Company

hirify.global is a Finnish fabless semiconductor company designing high-performance ICs and advanced RTLS technologies for international customers in wireless communications, automotive, consumer electronics and industrial applications.

What you will do

• Design and implement digital functionality for complex ASICs and mixed-signal ICs.
• Develop RTL in SystemVerilog or Verilog and contribute across architecture, specification, verification, physical implementation, tape-out and silicon validation.
• Work with synthesis, timing constraints, static timing analysis and design sign-off.
• Perform or support linting, CDC/RDC analysis, formal verification, DFT and physical implementation.
• Collaborate with system, analog, RF, layout and verification engineers, including technical planning, estimation, design reviews and customer discussions.
• Develop design methods, reusable solutions and internal tools; at Principal level, provide technical leadership, make architectural decisions, mentor designers and develop common practices.

Requirements

• B.Sc., M.Sc. or Ph.D. in electrical engineering, electronics or a related field.
• Strong professional experience in digital ASIC or SoC development and a good understanding of the overall ASIC development flow.
• RTL design experience with SystemVerilog, Verilog or VHDL.
• Experience with relevant Cadence, Synopsys or equivalent EDA tools.
• Experience in verification, debugging and resolving complex design issues.
• Scripting skills in Python, Tcl, Perl or similar languages.
• Ability to work independently and take ownership of technical deliverables.
• Good communication skills in English.

Nice to have

• Experience in UVM, DSP implementation, low-power design, mixed-signal ASICs, FPGA development, physical implementation or DFT.

Culture & Benefits

• Work on technically demanding international projects with experienced specialists across digital, analog, RF, system, layout and verification design.
• Low-hierarchy environment with high autonomy and influence over technical solutions, working methods and digital design capability.
• Multidisciplinary team valuing initiative, reliability and peer collaboration.
• Comprehensive benefits for employees based in Finland, including lunch, sports and culture, transport, well-being and dental allowances.
• Primarily a permanent, full-time position; EU consultancy arrangements may be available where suitable.

Hiring process

• Submit a CV, a short introduction describing relevant experience, preferred hirify.global location and a salary request or expected consultant rate.
• Applications are reviewed continuously, and suitable candidates may proceed before recruitment closes on 15.11.2026.