Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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$110к-176к/год
$160к$170кмедиана$190к
По похожим ролям (50) ~ $170к/год
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Крутая вакансия
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Здесь сочетаются продвинутая работа с ML и практический анализ выхода годных изделий и данных кремниевых чипов в крупной компании. Роль описана чётко и может дать глубокую экспертизу в узкой полупроводниковой области.
?Узкая специализация
Современный ML
Крупный производитель чипов
?Узкая отрасль
Мэтч & Сопровод
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Principal Machine Learning & Silicon Yield Engineer (AI/Semiconductors): Building predictive yield and PPA optimization tools from SoC telemetry and volume ATE production test data with an accent on machine learning, deep learning, GenAI, silicon characterization, and semiconductor manufacturing. Focus on analyzing wafer-level yield, circuit telemetry, failure mechanisms, and deploying scalable production workflows using Spice, Cadence Virtuoso, and STA tools.
Location: USA-AZ-Chandler-North Juniper Drive, United States of America
Annual base salary: USD 109,700–175,500
Company
hirify.global develops semiconductor technologies and related hardware products.
What you will do
Design, build, deploy, and productize ML, DL, and GenAI models for wafer-level yield prediction and PPA optimization.
Organize, clean, and analyze large multi-source SoC telemetry, sensor, and production test databases.
Interpret parametric data, on-chip sensor readouts, and circuit telemetry to identify failure mechanisms and marginalities.
Collaborate with foundry, product engineering, DFM, and DFT teams on yield and PPA strategies.
Develop, qualify, scale, and release experimental data workflows for production use.
Perform Spice modeling and simulation using relevant modeling tools, Cadence Virtuoso, and Primetime STA tools.
Requirements
MS with 6 years of experience or Ph.D. with 3 years of experience in Electrical Engineering, Computer Science, or a related field.
Proven semiconductor-industry experience in silicon macro characterization and SoC telemetry analysis.
Deep expertise applying machine learning and artificial intelligence techniques, including deep learning, anomaly detection, and multivariate regression, to physical hardware datasets.
Strong programming skills in Python, R, or C++ and hands-on experience handling massive databases.
Deep understanding of semiconductor manufacturing processes, wafer fabrication, DFM practices, and EDA tools.
Experience with Spice modeling tools, Cadence Virtuoso, and familiarity with Primetime STA tools.
Nice to have
Education or research experience at a top-tier semiconductor research institution such as Stanford, UC Berkeley, MIT, Purdue, or UIUC.
Culture & Benefits
Full-time employment with medical, dental, and vision plans.
401(k) participation with company matching, ESPP, EAP, paid holidays, paid sick leave, vacation, and applicable paid family and other leave.
Eligibility for a discretionary annual bonus, competitive new-hire equity grants, and annual equity awards, subject to plan documents and award agreements.
Equal-opportunity employment is provided in accordance with applicable federal, state, and local laws.
Hiring process
First-time applicants must create a candidate login account before applying; existing candidates must sign in before applying.
Applicants located outside the USA should provide a home address for future correspondence.
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