WPM Integration: Defect Engineer (Advanced Semiconductor Packaging)

Location: On-site in Albuquerque or Rio Rancho, New Mexico, or Hillsboro, Oregon, United States

Annual salary: $103,730–$146,440 USD

Company

hirify.global's Wafer Packaging Manufacturing organization develops and operates advanced packaging technologies and high-volume manufacturing processes, including EMIB, Foveros, TSV reveal, C4 bumping, Die Prep, and Wafer Level Assembly.

What you will do

• Own assigned advanced packaging layers, including defect inspection, classification, review operations, inspection recipes, and NPI procedures.
• Implement ADC solutions and maintain defect classification specifications and Defect Menageries.
• Set up and maintain SPC charts, OCAPs, defect tracers, and responses to out-of-control events with metrology and module engineering teams.
• Own process health, product quality, defect performance, yield trends, excursions, baseline process changes, and material risk assessments.
• Drive defect reduction through process and metrology data, SORT data, DOEs, FRECLs, AT%), and process-module experiments.
• Lead defect health reviews, analyze and correlate data, document improvement roadmaps, maintain dashboards, and communicate findings through weekly and quarterly reviews.

Requirements

• Bachelor's degree in engineering or a related field and 3+ years of experience, or a Master's degree and 2+ years of experience, or a PhD with no prior professional experience.
• Relevant experience must combine data extraction, synthesis, and analysis using tools such as SQL and Python.
• Experience with technology transfer and new product introduction activities in semiconductor manufacturing.
• Expertise in failure analysis and data mining techniques to identify trends and drive actionable improvements.
• Ability to lead problem-solving and process improvement initiatives.
• Exceptional communication skills for collaboration across multidisciplinary teams.
• Passion for mentoring and fostering technical growth within teams.
• This position is not eligible for hirify.global immigration sponsorship.

Nice to have

• Strong understanding of semiconductor process flow, equipment, and process characterization techniques.
• Experience with design of experiments, statistical process control, and process capability analysis.

Culture & Benefits

• Full-time, experienced-hire position on Shift 1.
• On-site work model required.
• Benefits include competitive pay, stock bonuses, health benefits, retirement benefits, and vacation.
• Work culture emphasizes trust, continuous improvement, shared accountability, mentoring, and cross-functional collaboration.