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9 дней назад

Formal Verification Engineer (AI Hardware)

200 000 - 400 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Formal Verification Engineer (AI Hardware): Owning block- and SoC-level formal verification for AI accelerator silicon, including property development, proof convergence, and silicon bring-up readiness with an accent on SystemVerilog Assertions, proof strategies, and AI-assisted verification workflows. Focus on debugging proof failures, building formal verification infrastructure, and solving complex hardware verification problems without established playbooks.

Location: San Francisco County, California, United States

Salary: $200,000–$400,000 per year

Company

hirify.global is partnering with an early-stage AI hardware startup redesigning AI datacenter infrastructure and silicon.

What you will do

  • Own block- and SoC-level formal verification for AI accelerator silicon from property development through proof convergence.
  • Develop SystemVerilog Assertions and formal verification environments for complex microarchitectural and system-level behavior.
  • Debug proof failures, identify root causes, and collaborate with RTL designers and architects to drive closure.
  • Build formal verification methodologies, infrastructure, and AI-assisted flows, including AI agents for proof generation and convergence.
  • Apply formal techniques from early architectural validation through silicon bring-up readiness.
  • Partner with design, verification, and software teams to deliver robust, scalable hardware.

Requirements

  • Master’s degree or equivalent experience and 8+ years of experience in formal verification for complex SoCs.
  • Deep expertise in formal verification methodologies, including property authoring with SVA and/or PSL, proof strategies, abstraction techniques, and convergence.
  • Strong experience debugging formal failures and working directly with RTL designers to resolve issues.
  • Hands-on experience with industry-standard formal verification tools such as Synopsys VC Formal, Cadence JasperGold, or equivalent.
  • Strong understanding of modern digital design and microarchitecture.

Nice to have

  • Processor verification or security verification experience.
  • Equivalence checking experience, including LEC/SEC.
  • AMS verification or IP verification flow experience.
  • Experience building automation or AI-assisted verification workflows.

Culture & Benefits

  • Own verification for critical AI accelerator hardware at an early-stage company.
  • Work on technically ambitious silicon with significant architectural influence.
  • Help define next-generation AI-assisted formal verification methodologies.
  • Collaborate with a small, highly experienced team building AI infrastructure from the ground up.

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