Digital and Programmable Logic Engineer Intern (FPGA)

Location: Tempe, Arizona, United States; site-based internship with 3+ days per week at a hirify.global office or work location

Salary: $20.91–$56.97 hourly. Certain locations in San Jose, the San Francisco Bay Area, and the New York City metropolitan area have a range of $25.96–$67.07 hourly.

Company

hirify.global develops communication connectivity for consumers, businesses, governments, militaries, and aerospace applications.

What you will do

• Design, develop, and test digital electronics, including FPGAs.
• Support products for commercial, military, airborne, and space applications.
• Collaborate with RF, power converter, mechanical, embedded software, manufacturing, and test engineers.
• Contribute to successful product development and transfer to production.

Requirements

• Currently pursuing a Bachelor’s degree or higher in Electrical Engineering or a related field.
• Final graduation date between December 2027 and August 2028.
• U.S. Citizenship required.
• Available to work 40 hours per week for the full internship duration; limited exceptions may be granted.
• Available for either May 17–August 6, 2027, or June 21–September 10, 2027.
• Knowledge of digital hardware design fundamentals and FPGA design methodology.
• Knowledge of FPGA verification and experience with test equipment.

Nice to have

• Understanding of basic digital design, Verilog, and SystemVerilog.

Culture & Benefits

• Collaborative, inclusive environment focused on positive impact.
• Flexible work environment within a site-based internship model.
• Housing assistance available pending eligibility.
• Intern compensation is predetermined and non-negotiable based on role, location, and degree level.
• Additional cash or stock incentives and benefits may be provided depending on the position.