Senior QPU Integration Engineer (Assembly & Characterization Focused)

Location: Hamburg, Germany; onsite

Company

hirify.global develops and operates full-stack quantum computers based on trapped-ion technology, combining laser-cooled trapped ions with microwave control and tailored magnetic fields.

What you will do

• Act as the technical expert for advanced chip assembly, back-end packaging, and post-fabrication integration of quantum processors.
• Develop and optimize packaging flows involving precision dicing, flip-chip bonding, wire bonding, 3D interconnects, substrate integration, and cryogenic packaging.
• Define and execute wafer-, die-, and post-packaging characterization using physical inspection, electrical probing, optical metrology, defect mapping, and cryogenic pre-screening.
• Lead internal cleanroom assembly and test workflows, including scheduling, procedure baselining, deviation resolution, and mentoring of technical staff.
• Coordinate design-for-assembly and design-for-testability activities with QPU designers, modeling engineers, and fab specialists.
• Manage packaging R&D, technology transfers, external foundry and OSAT projects, vendor deliverables, and assembly documentation.

Requirements

• Master’s or Ph.D. in Microelectronics, Electrical Engineering, Materials Science, Mechanical Engineering, Applied Physics, Nanotechnology, or a related field.
• At least 5 years of hands-on experience in microelectronics assembly, advanced semiconductor packaging, or chip characterization within a Class 10 / 100 / ISO 4–5 cleanroom.
• Deep expertise in flip-chip bonding, thermocompression or ultrasonic wire bonding, precision die attach, substrates or interposers, and encapsulation.
• Extensive experience with structural, optical, and electrical characterization, including automated wafer probing, SEM, optical profilometry, shear or pull testing, and defect mapping.
• Experience managing joint development projects or technology transfers with external packaging foundries, OSATs, or characterization laboratories.
• Strong project management skills covering timelines, risk mitigation, and vendor deliverables.
• Knowledge of SPC, DOE, PFMEA, and structured RCA methods such as 8D, 5-Whys, and Fishbone.
• Proficiency in Python with Pandas and NumPy, MATLAB, or SQL for yield extraction, automated analysis, and dashboarding.
• Strong leadership and communication skills across design, fab, assembly, and testing teams.
• Fluent English, written and spoken, with excellent technical writing and presentation skills.

Nice to have

• Experience with quantum hardware packaging, including low-loss superconducting interconnects, 3D integration or TSVs, and high-density cryogenic wiring or PCB interfaces.
• Hands-on experience with automated wafer probers, high-throughput inspection tools, or cryogenic characterization setups.
• Experience establishing assembly inspection lines or setting up cleanroom packaging tools from scratch.
• Experience managing external vendor contracts, assembly IP, and wafer-to-module delivery.

Culture & Benefits

• Full-time permanent employment with flexible working hours.
• Competitive salary with additional achievement-based rewards.
• International and diverse team with regular team events.
• Individualized training, personal development opportunities, and work at the intersection of academic research and commercial quantum computing.
• Wellness benefits, UrbanSportsClub fitness programs, bike leasing, and moving support with a relocation bonus.
• Modern laboratory, office, and meeting-room infrastructure.