Analog IC Layout Designer (CMOS)

Location: Waterloo, Ontario, Canada

Salary: $93,700–$124,900 per year

Company

hirify.global, part of Teledyne Technologies, develops high-reliability sensing and imaging technologies for industrial and advanced technology markets.

What you will do

• Create transistor- and block-level layouts for op-amps, references, ADCs/DACs, PLLs, sensor readout circuits, and high-speed interfaces.
• Optimize floorplans for matching, area, noise isolation, power integrity, and electromigration reliability.
• Apply common-centroid, interdigitation, symmetry, shielding, guard-ring, and dummy-device techniques.
• Run and resolve DRC, LVS, ERC, density, and fill verification, while minimizing parasitic coupling, process variation, and layout-dependent effects.
• Support parasitic extraction, post-layout simulation, and tapeout.
• Collaborate with design, process, reliability, verification, and CAD teams; contribute to layout reviews and mentor junior engineers when appropriate.

Requirements

• 3+ years of analog or mixed-signal IC layout experience.
• Strong understanding of analog matching, parasitics, device physics, ESD, and reliability.
• Ability to interpret transistor-level schematics and analog circuit behavior.
• Experience with advanced CMOS technologies and signoff.
• Proficiency with Cadence Virtuoso and Calibre, Assura, or equivalent tools.
• Bachelor’s or Master’s degree in electrical engineering, computer engineering, physics, or a related field.

Nice to have

• Experience with CIS, ADC/DAC, PLL, high-voltage, or low-noise sensor interfaces.
• Experience with EM/IR, layout-dependent effects, ESD/latch-up, advanced nodes, and tapeout.

Culture & Benefits

• Technically challenging work on advanced sensor ICs.
• Collaboration across multiple engineering disciplines.
• Opportunities to expand analog layout and silicon expertise.
• Exposure to designs from block level through integration and tapeout.
• Stability and engineering breadth within Teledyne Technologies.

Hiring process

• Applications are reviewed first, followed by a recruiter screen and technical/team interviews for selected candidates.
• Timelines vary by role and candidate availability.