Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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$51к$51кмедиана$51к
5 в выборке
90
Крутая вакансия
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Чётко описанная стартовая роль даёт практический опыт в создании чипов для AI-инференса, наставничество и участие в пути от архитектуры до тестирования кремния; главный компромисс - риск раннего стартапа.
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Риск стартапаПередовой AI-доменРост с наставникамиЧёткие задачи
Оценка от Hirify AI
Мэтч & Сопровод
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Early Career Processor Architect (AI Hardware): Defining compute engines, ISA specifications, and programming models for high-performance AI inference chips with an accent on performance modelling, memory hierarchies, and hardware-software trade-offs. Focus on analysing bottlenecks, connecting architectural decisions to physical design constraints, and validating processor designs before and after silicon.
Location: London - JJ Mack or Bristol - The Crescent, United Kingdom
Company
hirify.global is a startup developing chips and systems designed to run frontier AI models at thousands of tokens per second and support large models with long contexts.
What you will do
Define compute engines, ISA specifications, and programming models for AI inference silicon.
Work with senior architects and logical design, physical design, verification, and software teams.
Develop performance models, write specifications, and analyse architectural bottlenecks.
Assess memory hierarchies, on-chip interconnects, and the impact of physical design constraints on architecture.
Contribute to pre-silicon and post-silicon validation while progressing toward independent ownership of architecture work.
Requirements
Degree in Electronic Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
Solid foundational understanding of computer or processor architecture, including matrix- and vector-centric floating-point arithmetic and memory hierarchies.
Hands-on exposure to processor or accelerator design through coursework, a final-year project, FPGA build, RISC-V implementation, internship, placement, or research.
Some exposure to RTL design concepts and the relationship between physical design constraints and architectural decisions.
Clear communication skills and comfort working across architecture, modelling, implementation, verification, and software teams.
Ability to work effectively in ambiguity and fast iteration.
Nice to have
Exposure to architectural performance modelling tools such as gem5, SystemC, or custom cycle-accurate simulators.
Experience with compiler or toolchain interactions, or AI acceleration and vector-matrix compute, through study or projects.
Culture & Benefits
Full-time role in a diverse office environment.
Competitive salary reflecting experience and the specialist nature of the role.
Meaningful equity and ownership participation.
Private medical, dental and vision coverage, contributory pension, 25 days of holiday plus bank holidays, and life or critical illness insurance.
Additional eligibility checks may be required because the work is subject to UK, US, and other international export control regulations.
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