Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Чётко очерченная роль верификации AI-чипов сочетает заметную ответственность, работу на стыке команд и поддержку хорошо финансируемого стартапа; главный компромисс - быстрый темп и работа в офисе.
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Высокий темпАктуальный стекПерспективная сфераКрупное финансирование
Оценка от Hirify AI
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Silicon Verification Engineer (ML/AI): Building and verifying high-performance ML/AI integrated circuits for data-centre scale-out with an accent on pre-silicon RTL verification, testbench development, and functional quality. Focus on creating stimulus, checkers, coverage, and models while improving hardware-software workflows and contributing to architecture discussions.
Location: Based in either the London or Bristol office in the UK
Company
hirify.global is a startup founded in 2022 developing chips and systems for high-speed inference of frontier AI models, targeting thousands of tokens per second and long-context workloads.
What you will do
Verify ML/AI integrated circuits for scale-out data-centre applications through pre-silicon RTL verification.
Plan and execute verification from specification, including testbench development, stimulus creation, functional modelling, checker creation, and coverage definition and closure.
Read and debug SystemVerilog RTL and waveforms while improving tape-out quality and reducing development costs.
Collaborate with modelling, system architecture, RTL design, hardware, software, silicon, and modelling teams.
Contribute to specification, architecture, verification methodology, and working-practice discussions.
Drive verification work with ownership in a fast-paced, high-performance delivery environment.
Requirements
Ideally 6+ years of experience and a proven track record in pre-silicon RTL verification within high-performance delivery organisations.
Strong software skills, including Python or another object-oriented language such as C++.
Understanding of digital hardware concepts.
Ability to read and debug RTL in SystemVerilog and familiarity with debugging waveforms.
Software mindset for solving hardware problems, with attention to detail and rigorous execution.
Passion for verification and willingness to challenge established hardware-development practices.
Ability to work openly and collaboratively across hardware and software disciplines.
Candidates with UVM or a strong software background may apply even without an RTL background.
Nice to have
Experience with transaction-level modelling using UVM, SystemC, or another methodology.
SystemVerilog Assertions.
Fluency in multiple software languages.
Open-source silicon-development tools, including Cocotb, Verilator, or Icarus Verilog.
Commercial EDA tools and formal verification.
Working in a monorepo environment alongside software.
Bazel familiarity; it is the chosen tool but is not expected.
Experience contributing to architecture discussions.
Culture & Benefits
Small, ambitious, open, and collaborative team with ownership and agency to drive work forward.
Rapid iteration with direct collaboration with top leadership on ambitious hardware timelines.
Close integration across hardware, software, silicon, and modelling teams.
Competitive salary and meaningful equity ownership.
Private medical, dental and vision coverage, contributory pension, 25 days of holiday plus bank holidays, and life/critical illness insurance.
Inclusive and diverse office environment with a commitment to equal employment opportunity.
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