Advanced Semiconductor/MEMS Layout & Routing Engineer

Location: On-site in Brooklyn Park, Minnesota; Albuquerque, New Mexico; or Broomfield, Colorado.

Salary: $115,000–$145,000 annually.

Company

hirify.global develops a full-stack quantum computing platform for real-world applications across pharmaceuticals, materials science, financial services, government, industrial sectors, and research institutions.

What you will do

• Develop and refine manufacturable mask layouts for next-generation ion trap devices using Cadence Virtuoso, klayout, scripting, and related layout tools.
• Translate device concepts from initial design through layout verification and tapeout.
• Collaborate with design engineers, fabrication scientists, layout specialists, external foundries, vendors, and mask suppliers.
• Resolve layout challenges and support PDK and design-rule refinement.
• Align layouts and tapeout deliverables with foundry PDKs, process requirements, and best practices.
• Identify workflow automation and AI/ML opportunities to improve cycle times.

Requirements

• Bachelor’s degree minimum.
• At least 5 years of IC, MEMS, or PCB layout experience using advanced EDA tools such as Cadence Virtuoso, Synopsis, or L-Edit.
• At least 2 years of experience with PDKs, layout hierarchy, routing, verification, and tapeout processes.
• Must be a U.S. Person: U.S. citizen, permanent resident or green card holder, or worker granted asylum or refugee status.
• Due to U.S. Government national security requirements, candidates must not be nationals of the People’s Republic of China or Russia unless also a U.S. citizen.
• Applicants for safety-sensitive positions must complete a pre-employment drug test.

Nice to have

• Advanced degree in electrical engineering, computer science, computer engineering, mechanical engineering, physics, or a related field.
• Experience designing masks for multiple external foundries and technologies, including PDK integration and design-rule changes.
• Familiarity with SKILL scripting language.
• Photonics component layout, placement, and routing experience.
• Familiarity with autorouting tools for IC, PCB, or MEMS layout and interest in applying AI capabilities to layout.
• Experience in a cross-functional R&D environment.

Culture & Benefits

• Full-time, on-site work with flexible work arrangements supporting work-life balance.
• Employer-subsidized medical, dental, and vision insurance.
• 401(k) plan with company match and student loan repayment benefit.
• Equity opportunities, paid time off, sick leave, and 12 paid holidays annually.
• Paid parental leave and employee discount programs.

Hiring process

• Applications are accepted on an ongoing basis with no stated deadline.
• Reasonable adjustments are available during the recruitment process upon request.