Роль дает четкую сквозную ответственность за интеграцию фотонных чипов для космической аппаратуры и связана с развитием продуктовой компании, но требования экспортного контроля существенно ограничивают доступ.
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Ограничение по ITARСовременная фотоникаКомпания на подъемеШирокая зона ответственности
Оценка от Hirify AI
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Текст:
Hirify AI/Оригинал
TL;DR
Photonic IC Design Engineer, Chip-to-System Integration (Space) (Photonic ICs/Space): Designing, packaging, testing, and qualifying photonic integrated circuits and high-speed optical interfaces for spacecraft with an accent on chip-to-system integration, optical I/O, RF modulation, and ruggedized packaging. Focus on integrating PICs with drive electronics, closing coupling-loss and link-budget requirements, and validating hardware through radiation, thermal-vacuum, and vibration testing.
Location: United States - Remote; Seattle, WA. The person hired must be a U.S. person under ITAR or otherwise eligible for a federally issued export control license.
Base salary: $130,000–$200,000 plus equity.
Company
hirify.global develops and mass-produces high-power satellite platforms and photonic payloads for commercial and U.S. government missions from LEO to deep space.
What you will do
Design, simulate, and lay out PIC devices and circuits, including edge and grating couplers, spot-size converters, photodetectors, and passive components, through tapeout on commercial photonics foundry platforms.
Design high-speed traveling-wave Mach-Zehnder and ring modulators, including electrodes, terminations, RF launches, and co-design with RF and ASIC engineers.
Implement bias and tuning hardware with heaters and monitor photodiodes, and bring up closed-loop modulator bias and resonator locking over temperature and radiation.
Define optical I/O requirements, chip floorplans, link-budget inputs, and mechanical package components such as PIC carriers, fiber-array V-grooves, lids, strain relief, and alignment fixtures.
Lead radiation, thermal-vacuum, and vibration qualification campaigns, converting test results into design rules.
Partner with photonics test, automation, systems, RF, ASIC, manufacturing, foundry, and packaging teams on characterization, automated measurements, high-speed package interconnects, and design reviews.
Requirements
PhD or MS in electrical engineering, optics, physics, or a related field, or a Bachelor's degree with equivalent experience.
PIC designs taken through tapeout on one or more commercial integrated photonics platforms, with fabricated devices characterized in the lab. Relevant platforms include silicon photonics, silicon nitride, indium phosphide, and thin-film lithium niobate.
Hands-on chip-boundary experience with optical I/O design involving fiber attach or packaging, or high-speed modulator and RF design measured with a VNA, including S-parameters and electro-optic bandwidth.
Experience with photonic device simulation using Meep, Tidy3D, Lumerical FDTD, FEM, or EME; layout tools such as KLayout, gdsfactory, or Cadence; and Python for automation and data analysis.
U.S. person status under ITAR or eligibility for a federally issued export control license.
Nice to have
3D mechanical CAD experience with SolidWorks, Inventor, or Fusion for package parts or fixtures, including machine-shop-ready drawings.
Radiation, thermal-vacuum, or vibration testing of photonic or electronic devices.
Inverse design or topology optimization of couplers and other optical I/O devices.
RF package or board design to tens of GHz using tools such as HFSS or Sonnet.
Heterogeneous or 3D integration and co-packaged optics.
Hardware development for space or other harsh environments.
Modulator bias control, resonator locking, or other closed-loop photonic-device control.
RF or microwave engineering background.
Culture & Benefits
Fast-paced environment at a high-growth, Series D-funded space company.
Opportunity to contribute as a founding member of the photonics team and shape photonic hardware design, packaging, and qualification.
Equity in the company.
Paid time off, medical, dental, and vision coverage, life insurance, and paid parental leave.
Reasonable accommodation is available during the application or interview process.
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