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7 дней назад

Senior SoC Design Lead (SoC)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior/lead
Английский
c1
Страна
Finland
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Senior SoC Design Lead (SoC): Leading the development of next-generation microcontroller and wireless SoCs from architecture and specification through tape-out and production with an accent on SoC integration, RTL design, verification, power, performance, and quality. Focus on balancing architecture trade-offs, driving synthesis and sign-off, coordinating cross-functional interfaces, and solving silicon bring-up and root-cause challenges.

Location: Oulu, Finland or Tampere, Finland

Company

hirify.global is a Norwegian fabless semiconductor company specializing in wireless communication technology for the Internet of Things, including Bluetooth Low Energy, ANT+, Thread, Zigbee, LTE-M/NB-IoT, and Wi-Fi.

What you will do

  • Lead and grow the SoC design team through planning, task allocation, mentoring, and performance follow-up.
  • Own SoC-level architecture and microarchitecture decisions, balancing performance, power, area, cost, and time to market.
  • Drive the design flow from specification and RTL through integration, synthesis, timing closure, DFT, and sign-off.
  • Plan project schedules, deliverables, and risks, and report status to stakeholders and management.
  • Define integration and verification strategy, coordinate interfaces across analog, RF, memory, IP, physical design, test, and software teams.
  • Support silicon bring-up, debug, characterization, root-cause analysis, corrective actions, and improvements to design methodologies and quality practices.

Requirements

  • Master’s or PhD in electrical engineering, computer engineering, microelectronics, or a related field.
  • Extensive hands-on digital or SoC design experience, including several SoCs taken to tape-out and production.
  • Proven experience leading technical teams or large design projects, with strong planning and delivery skills.
  • Strong command of RTL design using Verilog/SystemVerilog, SoC integration, clock and reset architecture, and low-power design methods.
  • Solid understanding of embedded processor subsystems, bus fabrics, memory systems, and on-chip interfaces.
  • Experience with synthesis, static timing analysis, DFT, physical design handoff, and verification methodology.
  • Experience with silicon bring-up, debug, and root-cause analysis.
  • Strong communication and stakeholder management skills, plus fluent English.
  • Technical depth, leadership, ownership of results, cross-disciplinary collaboration, and enthusiasm for building SoCs.

Culture & Benefits

  • Professional and informal working environment with continuous development of skills and expertise.
  • Work alongside experienced engineers and recognized experts on varied tasks and projects.
  • Flexible working hours.
  • Medical insurance and family-friendly policies, insurance, and benefits.
  • Short- and long-term incentive plan.
  • Background check may be required.

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