Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
Пожаловаться
Зарплата и рынок
$74к-170к/год
$120к$150кмедиана$170к
По похожим ролям (50) ~ $150к/год
84
Хорошая вакансия
развернуть
Роль четко сфокусирована на FPGA-разработке и включает полноценную работу с проектированием и отладкой, а работодатель хорошо известен; при этом нужно быть готовым к работе в офисе и поездкам.
Кликните для подробной информации
Оценка от Hirify AI
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Подключить Plus
Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
FPGA Design Engineer (FPGA/Verilog): Developing RTL, interface-controller IP, and hardware controls for Xilinx FPGA and Lattice CPLD designs in compute, switch, and storage boards with an accent on simulation, synthesis, timing validation, and board bring-up. Focus on debugging complex hardware issues, integrating management interfaces and processors, and collaborating with firmware, board, operations, vendors, and design teams.
Location: Onsite in Spring, Texas, or Chippewa Falls, Wisconsin, United States, with an expectation of primarily working from an HPE office. Some travel may be required.
Base salary: USD 74,000–170,300 annual salary in Texas and Wisconsin; variable incentives may also be offered.
Company
hirify.global is an edge-to-cloud technology company developing solutions that connect, protect, analyze, and act on data and applications.
What you will do
Develop Verilog RTL for Xilinx AMD FPGA and Lattice CPLD designs, including IP for interface controllers and required functionality.
Select appropriate components based on cost, complexity, longevity, expandability, and other design criteria.
Design hardware controls and power sequencing, control, and monitoring for LSI and ASIC devices in compute, switch, and storage boards.
Generate programming models and collaborate with firmware engineers on driver development.
Lead or support development and field debugging, document issue investigation and resolution, and work with design teams, partners, vendors, and FPGA manufacturers.
Requirements
Bachelor's or Master's degree in Electrical Engineering.
At least 4 years of experience writing RTL for FPGAs for complex compute boards and/or ASIC designs.
Ability to read and understand complex digital board schematics.
Experience with or knowledge of BMC controllers and management interfaces using I2C, SMBUS, JTAG, SPI, LPC, Wishbone, eSPI, PCIe, Ethernet, and related protocols.
Ability to use laboratory equipment, oscilloscopes, and analyzers to debug complex problems.
Ability to work independently and within design teams on multiple projects, collaborating with engineers across global locations to meet design requirements and schedules.
Excellent written and verbal communication skills.
Nice to have
Knowledge of server-grade x86, ARM, and/or GPU processors.
Experience with Xilinx Spartan 6, Spartan 7, and Artix 7 families.
Culture & Benefits
Health, financial, and emotional wellbeing benefits for employees and their loved ones.
Personal and professional development programs supporting career growth and expert development.
Inclusive workplace focused on valuing varied backgrounds and individual uniqueness.
Flexibility to manage work and personal needs.
Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →