Senior Embedded SW/Firmware Design Engineer (FPGA)

Location: El Segundo, California, United States; full-time on-site work in the Hawthorne, California office. U.S. Person status is required to access U.S.-only data systems.

Salary: $160,000–$290,000 base compensation annually, excluding bonus, equity, and benefits.

Company

hirify.global develops advanced sensing and detection solutions for defense, commercial air operators, and border protection teams using Coherent Distributed Networks.

What you will do

• Design and implement complex FPGA architectures for next-generation radar and sensor products.
• Support system integration of FPGA designs with complex software systems.
• Support FPGA capabilities deployed with U.S. and international customers.
• Work across multiple product capabilities and product families within R&D and product engineering.

Requirements

• Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field.
• 5+ years of professional experience performing detailed digital RTL design targeting FPGAs.
• Extensive experience across the FPGA design lifecycle, including RTL design, behavioral simulation, place and route, timing analysis, and hardware integration.
• Extensive experience with Verilog, SystemVerilog, ARM AMBA AXI protocols including AXI4, AXI4-Lite, and AXI4-Stream, AMD Xilinx Vivado Design Suite, and SoC FPGAs including Zynq, Ultrascale/Ultrascale+, and Versal.
• Experience with network protocols including TCP, UDP, and IP, and serial protocols including I2C, JTAG, UART, SPI, and CAN.
• Experience using Bash and Python for scripting and testing.
• Experience modifying software drivers and applications to validate FPGA designs.
• Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development.
• Ability to work with minimal supervision and collaborate on small teams.
• U.S. Person status required for access to U.S.-only data systems.

Nice to have

• Experience designing highly performant FPGA baseband signal processing and translating algorithms from Simulink, MATLAB, or similar tools into RTL, including FPGA vendor IP implementations.
• Experience developing C, C++, or Python software drivers for FPGA interfaces.
• Experience with FPGA Ethernet IP blocks, Software-Defined Radios, Analog Device Transceivers, ground or airborne sensors, and time synchronization technologies such as NTP/PTP.
• Experience with HLS synthesis and C, C++, SystemC, or Chisel; VHDL; and high-speed, multi-layer digital PCB design.
• Current or previous DoD security clearance.
• Experience with GPUs or AI engines, Git, Bitbucket CI, Jenkins, or similar CI/CD flows.
• Experience with DoD and related system/software architectures and messaging standards such as OMS, SOSA, and Link-16.

Culture & Benefits

• Medical, dental, and vision benefits fully paid by the company.
• 401(k) with a 50% company match up to 6% of pay, plus FSA, HSA, and life insurance.
• Free daily lunch, no-meeting Fridays, unlimited PTO, and a casual dress code.
• Competitive base salary, pre-IPO stock options, relocation assistance, and annual bonuses planned for the future.
• Approximately 500 employees across five global offices.