4 дня назад
Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization (AI/ML)
150 800 - 241 200$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization (AI/ML): Building distributed multi-agent AI infrastructure for embedded-memory design, characterization, silicon bring-up, and yield optimization with an accent on LLM agent orchestration, EDA integration, and semiconductor data analysis. Focus on developing autonomous workflows, classifying scan failures, predicting yield excursions, and integrating AI systems with production engineering tools.
Location: Austin, Texas, United States; other listed locations include San Jose and Irvine, California.
Annual base salary: $150,800–$241,200, plus discretionary annual bonus and equity opportunities.
Company
develops semiconductor and infrastructure technology products, including advanced embedded-memory solutions.
What you will do
- Architect, deploy, and scale distributed multi-agent AI frameworks for memory design, characterization, performance, power, area, and yield optimization.
- Build autonomous agent workflows for memory development, silicon bring-up, and yield analysis.
- Integrate LLM-driven agent pipelines with EDA suites, internal software tools, and enterprise data repositories.
- Develop ML-driven scan-failure classification for Chain, Stuck-at, and Transition failures and correlate results with DFT structures.
- Build predictive yield models using fab process parameters, PCM data, and E-test data.
- Collaborate with memory design leads, EDA specialists, and infrastructure engineers to convert hardware methodologies into modular agentic workflows.
Requirements
- 15+ years of relevant experience in memory design, DFT, silicon yield analysis, software architecture, and AI systems engineering.
- Master’s degree or Ph.D. in Electrical Engineering or Computer Engineering.
- Experience designing and characterizing embedded memory in advanced process nodes and with compute-in-memory architecture.
- Production-grade LLM application experience, including multi-agent orchestration, tool use, RAG, MCP servers, and LangGraph.
- Hands-on familiarity with Synopsys, Cadence, or Siemens EDA tooling, SystemVerilog, UVM, and chip-design verification environments.
- Strong Python and TCL skills, plus experience with microservices, REST APIs, Docker, Kubernetes, sandboxing, vector databases, and AI evaluation and safety guardrails.
Culture & Benefits
- Collaboration across memory design, EDA, infrastructure, and central engineering teams.
- Medical, dental, and vision plans.
- 401(k) participation with company matching and an Employee Stock Purchase Program.
- Paid holidays, sick leave, vacation time, and applicable family and other leave programs.
- Employee Assistance Program and company-paid benefits.
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