AI Architect (Agentic AI for Chip Design & EDA)

Location: San Jose, California, United States

Salary: $209.5K–$295.0K USD for the Bay Area, California.

Company

hirify.global develops semiconductor design solutions and EDA-related technologies for the silicon development and manufacturing lifecycle.

What you will do

• Lead the strategy, architecture, and development of AI-driven solutions for semiconductor design and optimization.
• Develop agentic AI systems and multi-agent platforms that automate RTL, synthesis, physical design, signoff, validation, DRC, power planning, and 3D-IC workflows.
• Advance domain-specific LLMs, foundation models, RAG systems, AI copilots, code generation, and autonomous engineering agents.
• Apply machine learning, reinforcement learning, graph neural networks, and predictive analytics to improve PPA, manufacturability, reliability, and silicon yield.
• Architect enterprise-scale AI platforms, data pipelines, analytics frameworks, APIs, and distributed infrastructure using Python, C/C++, databases, cloud technologies, and big data systems.
• Lead DTCO and design-to-manufacturing initiatives while mentoring technical teams, influencing product roadmaps, and representing the company at industry forums.

Requirements

• Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a related technical field.
• 12+ years of semiconductor industry experience spanning multiple phases of the silicon lifecycle.
• Deep knowledge of digital IC design, RTL, synthesis, physical implementation, timing closure, verification, and signoff.
• Advanced expertise in AI/ML, including generative AI, LLMs, reinforcement learning, graph neural networks, and predictive modeling.
• Advanced programming skills in Python and one or more of C/C++, Java, or similar languages, plus experience building enterprise software, AI platforms, or automation systems.
• Applicants must be eligible for any required U.S. export authorizations.

Nice to have

• Experience developing agentic AI systems, domain-specific LLMs, RAG architectures, AI copilots, or autonomous workflow solutions.
• Hands-on experience with Cadence, Synopsys, Siemens EDA, or equivalent tools and workflows.
• Expertise in cloud computing, distributed systems, Spark, data engineering, and large-scale AI infrastructure.
• Knowledge of 3D-IC, advanced packaging, silicon photonics, advanced process technologies, or foundry operations.
• Patents, publications, conference presentations, or experience leading global multidisciplinary engineering teams.

Culture & Benefits

• Regular full-time employment with incentive opportunities tied to individual and company performance.
• Cross-functional collaboration across design engineering, EDA, manufacturing, data science, foundry, and silicon validation teams.
• Opportunities to contribute to patents, publications, strategic partnerships, and industry conferences.
• Shift 1 schedule in the United States of America.