Sort/Test Quality & Reliability Engineer (QRE) (Semiconductor Manufacturing)

Location: Hillsboro, Oregon, United States. Hybrid work model with time split between the assigned hirify.global site and off-site work.

Annual salary range: $120,860–$231,670 USD.

Company

hirify.global develops semiconductor technology and manufacturing solutions, including products and systems supported by high-volume manufacturing.

What you will do

• Lead test process development, qualification, certification, and high-volume manufacturing ramp across semiconductor products, architectures, sort, and back-end test.
• Define quality and reliability requirements, readiness criteria, acceptance plans, FMEA, and risk mitigation for tester platforms, modules, interface hardware, burn-in, wafer and die sort, metrology, and supplier hardware.
• Lead installation, operational, measurement system, transfer, reliability, change, and production qualification activities.
• Support technology transfer to ATM factories and provide QRE support for engineering, qualification, pilot, and revenue production.
• Establish and maintain FMEA, Control Plans, MSA, SPC, OCAP, calibration, traceability, data integrity, change control, work instructions, and audit-ready evidence.
• Lead excursion, yield, hardware, and reliability investigations using 8D, 5 Why, fault isolation, DOE, statistical analysis, and model-based problem solving.

Requirements

• Bachelor's degree with 4+ years of relevant experience, or Master's degree with 3+ years of relevant experience, or a PhD in a related technical field.
• Experience in test process development, semiconductor manufacturing, product test methodology, hardware development, reliability engineering, failure analysis, process certification, or related areas.
• Ability to lead risk assessments, qualification plans, corrective actions, readiness reviews, technical decisions, and cross-functional execution.
• Strong statistical, analytical, written, and verbal communication skills.
• Experience or knowledge related to semiconductor test flow, wafer or die sort, final test, burn-in, SLT, HDMT/AHMT, V93K, Advantest, die preparation, probing, packaging, or back-end test is valuable.
• Knowledge of electrical, thermal, mechanical, contamination, ESD, and test-induced product risk assessment is valuable.

Nice to have

• Experience with JMP/JSL, SQL, statistical modeling, process capability, correlation, and predictive monitoring.
• Background in advanced packaging, foundry manufacturing, supplier quality, or ODM manufacturing systems.
• Knowledge of Test Process Definition, Test Process Certification, ATTD development, HVM transfer, and ATM excursion management.

Culture & Benefits

• Hybrid work model combining on-site work at the assigned hirify.global site with off-site work.
• Competitive compensation with stock bonuses.
• Health, retirement, and vacation benefit programs.
• Collaborative, cross-functional environment focused on semiconductor innovation, quality, and reliability.

Hiring process

• Applications are reviewed against the minimum qualifications and preferred experience.
• Recruiter discussions and interviews are part of the hiring process.