DFT Design Engineer (DFT)

Location: Jerusalem, Israel; additional location: TLV. Shift: Israel Shift 1.

Company

hirify.global develops Design-for-Test solutions for complex integrated circuits and supports their integration into IP and SoC designs.

What you will do

• Develop RTL, logic designs, simulations, DFT timing closure, and test content for SCAN, MBIST, and BSCAN.
• Define DFT architecture and microarchitecture features for blocks, subsystems, and SoCs.
• Optimize logic for test coverage, DPM, test-time and vector-memory reduction, and physical implementation integrity.
• Review verification plans, drive DFT verification, and resolve failing RTL tests.
• Integrate DFT blocks into functional IP and SoCs and support IP integration.
• Collaborate with post-silicon and manufacturing teams on silicon verification, debugging, documentation, and mixed-signal IP DFT experiments.

Requirements

• Bachelor’s degree in Electronics Engineering.
• At least 4 years of DFT experience.
• Strong experience with scan architecture, scan insertion, and ATPG execution.
• Experience defining and implementing scan procedures.
• Experience with mixed-signal IP DFT, MBIST implementation, and MBIST validation.
• Hands-on experience in RTL design, DFT integration, verification, and IP/SoC-level DFT activities.

Culture & Benefits

• Regular full-time employment.
• Collaboration across design, verification, post-silicon, and manufacturing teams.