Principal Product Applications Engineer (PCIe)

Location: San Jose, California, United States

Salary: $207,000–$230,000 per year, depending on experience, level, and business need. Discretionary bonuses, incentives, and benefits may also apply.

Company

hirify.global provides rack-scale AI infrastructure through connectivity solutions based on PCIe, CXL, Ethernet, NVLink, UALink, UCIe, and its COSMOS software suite.

What you will do

• Lead customer and ecosystem-partner engagements to define Scorpio-based PCIe architectures and deployment requirements.
• Develop reference designs, application guidance, technical presentations, and system-level collateral.
• Translate customer use cases into product requirements, integration plans, and prioritized technical actions.
• Drive platform bring-up, debugging, and interoperability across PCIe hosts, GPUs, NICs, storage devices, and other high-performance endpoints.
• Partner with firmware, architecture, design, validation, and applications teams to define configuration, boot, telemetry, recovery, and field-debug capabilities.
• Lead root-cause analysis and resolve complex issues from prototype through production.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• 8–12 years of experience in product applications, systems engineering, firmware, platform validation, or a related semiconductor domain.
• Strong understanding of PCIe architecture, including link training, enumeration, configuration space, error handling, performance, and interoperability.
• Experience with firmware development or debugging, including reading code, interpreting logs, and collaborating with firmware developers.
• Hands-on experience with system bring-up, lab debugging, protocol analysis, and root-cause investigation across complex hardware and software stacks.
• Strong written and verbal communication skills for explaining technical issues to engineering teams and customers.

Nice to have

• Experience with PCIe Gen 6 or Gen 7, PCIe fabric switches, retimers, or other high-speed connectivity products.
• Familiarity with UALink, UCIe, and emerging scale-up or scale-out interconnect architectures.
• Experience developing validation plans, firmware test strategies, lab automation, or customer-facing technical collateral.
• Background supporting AI servers, accelerator platforms, hyperscale infrastructure, or high-performance computing systems.
• Experience leading ambiguous, cross-functional technical challenges in a fast-paced environment.

Culture & Benefits

• Work across hardware, firmware, validation, applications, architecture, design, and customer-facing teams.
• Opportunity to influence next-generation AI infrastructure connectivity and ecosystem interoperability.
• Discretionary bonus, incentives, and benefits may be available.
• The company encourages applications from people with diverse backgrounds and experiences.