6 дней назад
Design Verification Intern (Semiconductor)
Мэтч & Сопровод
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Описание вакансии
Текст:
TL;DR
Design Verification Intern (Semiconductor) (SystemVerilog/UVM/Python/C++): Developing and verifying next-generation network switch features with an accent on object-oriented random verification, coverage analysis, and high-performance, low-power designs. Focus on building verification environments, debugging simulation failures to root cause, implementing new protocols, and automating repetitive tasks with scripting languages.
Location: Petah-Tikva, Israel
Company
develops semiconductor solutions for enterprise, cloud, AI, and carrier data infrastructure.
What you will do
- Implement and verify new features for next-generation network switch products.
- Develop SystemVerilog/UVM object-oriented random verification environments and test plans.
- Create tests, analyze code and functional coverage, and tune environments to meet coverage goals.
- Debug simulation failures and identify root causes.
- Use scripting languages to automate repetitive tasks and improve verification efficiency.
- Investigate and implement new protocols and complex features through tapeout-quality verification.
Requirements
- Pursuing a BS or MS degree in computer science, electrical engineering, or a related technical field.
- At least two years remaining before graduation.
- Good understanding of object-oriented programming and digital logic.
- Strong problem-solving, collaboration, and interpersonal skills.
- Eligibility to access export-controlled technology and software under applicable U.S. export control regulations may be required.
Culture & Benefits
- Full-time position with competitive compensation and benefits.
- Collaborative, transparent, and inclusive work environment.
- Hands-on learning with modern design and verification tools and methodologies.
- Resources and development opportunities for building engineering expertise.
- AI tools are not permitted during interviews unless explicitly authorized by the interviewer.
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