Analog Design Intern - BS - 2027 Co-Op (Analog IC Design)

Location: Vancouver, Canada; PEY positions are located at the hirify.global Toronto Design Centre and hirify.global headquarters in Santa Clara, California.

Expected base pay: CAD 36–48 per hour.

Company

hirify.global develops semiconductor solutions for enterprise, cloud, AI, automotive, carrier, and other data infrastructure markets.

What you will do

• Support analog IC design and layout for analog IP products.
• Participate in silicon evaluation and characterization.
• Define and follow project schedules.
• Develop behavioral models for analog and digital circuits.
• Use Cadence tools for schematic capture, simulation, and layout.
• Collaborate effectively within a cross-functional engineering group.

Requirements

• Bachelor’s student in electrical engineering, computer engineering, or a related program.
• Strong intuitive and analytical understanding of transistor-level design.
• Knowledge of general analog design techniques, operational amplifiers, feedback systems, or digital logic design.
• Experience with Cadence schematics capture, simulation, and layout.
• Effective written and verbal communication skills.
• Ability to work at the designated hirify.global design location in Canada or the United States.

Nice to have

• PLL and SERDES design experience.
• RF and microwave knowledge.

Culture & Benefits

• Competitive compensation and benefits.
• Collaborative and transparent work environment.
• Inclusive workplace focused on professional growth and development.
• Exposure to a variety of IC design engineering skills and tools.

Hiring process

• Interviews assess individual experience, thought process, and communication skills.
• AI tools, transcription apps, automated answer generators, and note-taking bots are not permitted during interviews.
• Access to export-controlled technology may require an export license review.