Member of Technical Staff - RTL Design (AI)

Location: Santa Clara, Boulder, Virginia, the San Francisco Bay Area, San Mateo, or Mountain View; remote work is available across Eastern and Central Time Zones in the US. Some Bay Area positions are onsite.

Salary: $200,000–$300,000 annually, with other listed ranges reaching up to $400,000 and possible equity.

Company

hirify.global is partnering with an early-stage semiconductor startup developing an AI inference architecture for large-scale data center deployments.

What you will do

• Own the architecture and microarchitecture of the data movement subsystem for a next-generation AI accelerator SoC.
• Architect high-performance data movement pipelines, scheduling mechanisms, control logic, NoCs, crossbars, switches, buffers, scratchpad memories, and memory pathways.
• Develop microarchitectural solutions that balance throughput, utilization, latency, power, and area.
• Use performance models and workload analysis to guide architecture decisions and hardware/software trade-offs.
• Collaborate with compiler, kernel, performance, RTL, verification, and physical implementation engineers.
• Support RTL implementation, verification, timing closure, emulation, tapeout, first-silicon bring-up, performance analysis, and silicon debug.

Requirements

• Senior or principal-level experience with 5–10+ years of relevant industry experience.
• Deep expertise in NoC architecture, buffering, memory systems, switching and crossbar fabrics, and scheduling.
• Proven ownership of complex data movement or memory-related hardware across multiple silicon generations.
• Direct experience designing AI accelerators, GPUs, NPUs, or other high-performance compute architectures.
• Strong understanding of performance-per-watt and PPA optimization, with experience taking designs through to working silicon.
• MS, PhD, or equivalent technical background, with the ability to work across architecture, microarchitecture, and implementation.

Nice to have

• Experience in a startup or early-stage silicon environment.

Culture & Benefits

• Significant architectural ownership in an early-stage accelerator platform.
• Opportunity to influence a new AI accelerator architecture from initial definition through silicon optimization.
• Hands-on collaboration across hardware, software, implementation, and verification disciplines.