DFT Engineer

Location: Tianjin (Teda), China; onsite

Company

hirify.global develops semiconductor products and complex SoC designs.

What you will do

• Implement and verify Scan, MBIST, and Boundary Scan solutions for complex SoC designs.
• Perform scan insertion, DFT design-rule checks, and scan-chain validation.
• Analyze fault coverage and develop ATPG patterns for production silicon testing.
• Develop and maintain DFT automation flows and scripts using Tcl, Perl, Python, or Shell.
• Collaborate with SoC Design, Verification, Physical Design, and Test Engineering teams to resolve DFT and test issues.
• Support silicon bring-up, diagnosis, and yield improvement during product ramp-up and production.

Requirements

• Bachelor’s or Master’s degree in Electronics Engineering, Electrical Engineering, Computer Science, or a related field.
• 1–3 years of experience in VLSI design, DFT, or a related semiconductor engineering field.
• Good command of English; CET-6 or equivalent proficiency is preferred.
• Knowledge of DFT methodologies, including Scan, MBIST, and Boundary Scan.
• Proficiency in Verilog, VHDL, and scripting languages such as Tcl, Perl, Python, or Shell.
• Strong communication skills and the ability to work effectively in a global team environment.

Nice to have

• Hands-on experience with SoC DFT design and implementation for large-scale chips.
• Familiarity with ASIC/SoC development, verification, and implementation processes.

Culture & Benefits

• Collaboration with global SoC Design, Verification, Physical Design, and Test Engineering teams.
• Involvement across the full product development cycle, from design through production ramp-up.