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11 дней назад

Senior MTS - IP Engineering (Semiconductor)

81 907 - 122 860€
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US/Netherlands
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Senior MTS - IP Engineering (Semiconductor): Leading the development and delivery of advanced processor and compute IP solutions with an accent on architecture, RTL design, verification, implementation, and signoff readiness. Focus on defining technical strategies, solving complex IP development challenges, mentoring engineers, and coordinating multidisciplinary teams across multiple locations.

Location: Netherlands

Salary: €81,907.20–€122,860.80 per year, depending on qualifications, experience, and location.

Company

hirify.global is a global semiconductor manufacturer providing process technology, design, development, and manufacturing services across the United States, Europe, and Asia.

What you will do

  • Lead the development and delivery of advanced processor and compute IP solutions through high-quality execution and signoff readiness.
  • Provide technical leadership across architecture, design, verification, implementation, and product delivery.
  • Define and review technical strategies, development plans, specifications, methodologies, and quality processes.
  • Collaborate with cross-functional teams, customers, and stakeholders on technology roadmaps and product development.
  • Mentor engineers and strengthen technical capabilities and engineering practices.

Requirements

  • Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
  • At least 10 years of experience in digital IC/IP development, design, verification, implementation, or technical project leadership.
  • Strong understanding of processor, memory, and system architectures.
  • Experience with RTL development, simulation, formal verification, signoff processes, and semiconductor EDA flows.
  • Proficiency with SystemVerilog and Verilog.
  • Strong analytical, communication, stakeholder management, mentoring, and technical leadership skills.

Nice to have

  • Experience leading large-scale or multi-site engineering projects and teams.
  • Expertise in processor microarchitecture, RTL design, functional or formal verification, or SoC/IP integration.
  • Programming or scripting experience with Python, C, C++, or similar languages.
  • Experience with methodology improvements, automation initiatives, customer engagement, or technical roadmap discussions.

Culture & Benefits

  • Work with multidisciplinary engineering teams across multiple locations.
  • Contribute to a diverse and collaborative engineering environment.
  • Support is available for reasonable accommodation during the employment process.
  • Employment practices follow equal opportunity and applicable legal requirements.

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