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33 минуты назад

Principal Product Engineer – High-Speed IP UCIE

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
SK
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Principal Product Engineer – High-Speed IP UCIE (UCIe/high-speed interface IP): Leading product engineering across pre-sales, pre-silicon integration, post-silicon bring-up, and customer deployment with an accent on subsystem integration, technical leadership, and customer-facing execution. Focus on resolving complex RTL, gate-level simulation, synthesis, STA, timing-closure, and silicon-debug challenges while coordinating global cross-functional teams.

Location: Gyeonggi-do (Seoul), South Korea

Company

hirify.global develops digital and mixed-signal IP solutions for high-performance semiconductor and interface applications.

What you will do

  • Own product engineering for UCIe die-to-die subsystems at customer sites.
  • Lead customer engagements, technical discussions, design reviews, and deployment strategies.
  • Resolve complex subsystem integration and implementation issues across the product lifecycle.
  • Lead SoC integration reviews covering PHY and controller subsystems.
  • Provide technical leadership for RTL, gate-level simulation, synthesis, STA, timing closure, and post-silicon bring-up.
  • Collaborate with R&D, validation, and applications teams, mentor junior engineers, and use AI tools to improve debugging and data analysis.

Requirements

  • Bachelor’s degree in electrical engineering, computer engineering, or a related field with 7+ years of experience; alternatively, a master’s degree with 5+ years or a PhD with relevant experience.
  • Strong experience with high-speed interface IP and deep knowledge of RTL design, gate-level verification, and simulation methodologies.
  • Experience with synthesis, static timing analysis, timing closure, DFT methodologies, test flows, and system validation.
  • Ability to solve complex technical problems, drive root-cause analysis to closure, and manage multiple priorities and escalations.
  • Experience leading cross-functional technical efforts and representing the organization in customer-facing technical roles.
  • Strong communication, ownership, and independent execution skills.

Nice to have

  • Experience with DDR, LPDDR, PCIe, Ethernet, UCIe, USB, or other memory and high-speed communication interfaces.
  • Understanding of analog and mixed-signal design practices.
  • Experience with customer-facing silicon debug and bring-up.
  • Familiarity with AI-assisted workflows and data-driven debugging techniques.

Culture & Benefits

  • Full-time position within a growing and dynamic IP team.
  • Collaboration across global, cross-functional engineering teams.
  • Opportunity to lead customer deployments and influence product readiness and engineering quality.

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