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6 дней назад

Sr Analog Engineer (Mixed-Signal)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
SK
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Sr Analog Engineer (Mixed-Signal): Developing and industrializing configurable mixed-signal semiconductor products and high-performance analog IP with an accent on transistor-level architecture, PVT robustness, silicon validation, and analog/digital collaboration. Focus on designing and modeling analog circuits, guiding layout, analyzing ATE data, and solving performance and functional issues across the product development flow.

Location: Seongnam-si, Gyeonggi-do, South Korea; onsite only

Company

hirify.global is an embedded semiconductor solution provider developing technology for automotive, industrial, infrastructure, consumer, communication, computing, data center, and IoT applications.

What you will do

  • Develop and industrialize configurable mixed-signal products, including analog IP, DC-DC converters, and FPGA-based solutions.
  • Analyze transistor- and system-level architectures and ensure high-precision analog block performance across process, voltage, and temperature variations.
  • Develop silicon-proven analog and mixed-signal IP and model circuits for top-level testbenches.
  • Collaborate with digital, layout, test, characterization, and design engineering teams on trimming, control, layout effects, and test coverage.
  • Evaluate IPs using laboratory equipment such as multimeters and oscilloscopes, and analyze ATE and CHZ data against product specifications.
  • Perform root cause analysis of performance and functional issues and document analysis and conclusions.

Requirements

  • MD or PhD in electrical engineering with semiconductor design experience using CMOS.
  • Strong knowledge of analog and mixed-signal circuit architecture, design, and layout, including amplifiers, comparators, bandgaps, generators, oscillators, regulators, data converters, and digital logic.
  • Strong background in analog and digital IC design, layout, process, measurement, and mixed-signal top-down development for PPA optimization.
  • Experience with simulation and design tools including Cadence, Verilog, and Python.
  • Experience in semiconductor reliability and failure analysis, including correlating hand calculations with simulation results.
  • Strong English communication skills required for collaboration with design, characterization, test engineering, and technical writing teams across multiple countries.

Culture & Benefits

  • Collaborative environment within a global organization of more than 21,000 engineers and problem solvers across over 30 countries.
  • Culture based on being Transparent, Agile, Global, Innovative, and Entrepreneurial.
  • Competitive benefits package provided alongside salary.
  • Equal opportunity and affirmative action employment environment.

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