Sr. Principal Product Engineer (Voltus)

Location: San Jose, California, United States

Salary: $161,000–$299,000 annual base salary, plus potential bonus, equity, and benefits.

Company

hirify.global develops technology products and platforms for electronic design, power integrity, and semiconductor signoff workflows.

What you will do

• Serve as the primary technical interface between Voltus product engineering, R&D, strategic foundries, customers, and Applications teams.
• Lead advanced-node IR/EM signoff enablement, including flow and techfile readiness, PDK integration, reference flows, qualification, benchmarking, and production deployment.
• Resolve complex customer issues involving static and dynamic IR, EM, low-power and multi-voltage domains, hierarchical and full-chip signoff, and timing or stack-die interactions.
• Define and validate foundry-aligned power-integrity and EM modeling assumptions with PDK, extraction, and signoff teams.
• Influence the product roadmap for AI-driven IR mitigation, 3DIC, and electrothermal co-analysis.
• Mentor Lead and Principal Product and Applications Engineers while establishing debugging, deployment, and issue-tracking practices.

Requirements

• Bachelor’s degree in Electrical, Electronics, or VLSI Engineering with 10+ years of related experience, or a master’s degree with 8+ years, or a PhD with 6+ years.
• Deep hands-on experience with industry-standard IR/EM and PDN analysis tools and digital physical implementation or signoff flows.
• Strong knowledge of CMOS and digital design, power IR-drop analysis, circuit analysis, and low-power or multi-power-domain chip power-integrity signoff.
• Ability to debug large SoC and PDN problems and connect customer requirements with R&D fixes and deployment.
• Proficiency in Tcl and Python, with strong written, verbal, and presentation skills for customer and executive audiences.
• Role location: San Jose, California.

Nice to have

• Experience with Voltus and adjacent hirify.global tools such as Integrity, Tempus, Innovus, and Quantus/QRC.
• Experience with 3DIC, chiplets, electrothermal analysis, or advanced FinFET and GAA nodes.
• Technical leadership experience with PE or AE teams or strategic account and foundry programs.

Culture & Benefits

• Paid vacation and holidays.
• 401(k) plan with employer match.
• Employee stock purchase plan.
• Medical, dental, and vision plan options.
• Potential incentive compensation through bonus and equity.