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ASIC Engineering Director (Communication SoC)

Формат работы
onsite
Тип работы
fulltime
Грейд
director
Английский
c1
Страна
Poland
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
ASIC Engineering Director (Communication SoC): Building and leading a Kraków ASIC engineering organization focused on verification, front-end design, digital architecture, and high-performance communication SoCs for a satellite communications network with an accent on verification strategy, silicon delivery, and lab integration. Focus on scaling engineering teams, guiding complex SoC development from architecture through silicon bring-up, and integrating FPGA prototyping, embedded systems, RF, and mixed-signal validation.

Location: Kraków, Poland

Company

hirify.global develops reusable space vehicles and systems and is building TeraWave, a multi-orbit satellite communications network based on optically interconnected LEO and MEO satellites.

What you will do

  • Establish, lead, and grow the Kraków ASIC engineering organization, initially focused on design verification and expanding into front-end design and digital architecture.
  • Define the technical strategy, staffing plan, operating model, engineering processes, roadmap, and execution plans.
  • Lead ASIC and SoC development from requirements and architecture through RTL design, verification, implementation, tape-out, silicon bring-up, and qualification.
  • Build scalable verification methodologies covering functional and code coverage, assertions, formal verification, emulation, FPGA prototyping, gate-level simulation, and regressions.
  • Oversee the shared ASIC and prototype integration laboratory supporting FPGA prototyping, hardware-in-the-loop testing, embedded software and firmware integration, modem and digital beamformer development, and system-level debug.
  • Partner with ASIC, systems, software, firmware, analog/mixed-signal, RF, physical design, DFT, product engineering, and program leadership teams.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
  • 15+ years of relevant experience in ASIC, SoC, semiconductor, or complex digital system development.
  • 8+ years leading engineering organizations, including hiring, team development, execution, and technical direction.
  • Demonstrated experience delivering complex ASICs or SoCs through tape-out and silicon bring-up, including complex SoC design verification with SystemVerilog.
  • Strong knowledge of RTL design, CDC/RDC, lint, timing, low-power and multi-voltage design, DFT, LEC, floorplanning, static timing analysis, power analysis, and SoC integration.
  • Fluency in English is required.

Nice to have

  • MS or PhD in a related technical discipline and experience establishing a new ASIC organization or engineering site.
  • Experience with communication SoCs, modem architectures, wireless or satellite communications, RF systems, and DSP-intensive products.
  • Experience with digital-top mixed-signal SoCs, analog macro modeling, AMS co-simulation, and mixed-mode verification.
  • Experience with lab automation using Python, SCPI, MATLAB, LabVIEW, or comparable tools.
  • Fluency in Polish or experience working effectively within Polish engineering organizations.

Culture & Benefits

  • Work in a culture focused on safety, collaboration, inclusion, technical excellence, ownership, and continuous improvement.
  • Support a high-performing engineering site with shared laboratory infrastructure and cross-functional technical leadership.
  • Collaborate with engineering leaders and teams across hirify.global’s global organization.
  • Travel as required to support collaboration with other locations, suppliers, technology partners, and program teams.

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