Senior Memory Designer (SRAM/CRAM)

Location: Penang, Malaysia; candidates must provide satisfactory proof of their right to work in Malaysia

Company

hirify.global develops low-cost, low-power programmable logic solutions, including FPGA, CPLD, and programmable power management devices.

What you will do

• Lead the design and development of high-speed, low-power SRAM and configuration RAM circuits.
• Develop memory architectures and implement them in FinFET and nanometer CMOS technologies.
• Perform schematic capture, simulation, margin verification, characterization, timing, and model generation.
• Oversee layout planning and tight pitch-matched memory layout designs.
• Define memory performance, power, area, and yield targets with architecture and design teams.
• Manage the full embedded memory design flow and contribute memory innovations to FPGA designs.

Requirements

• Over 10 years of experience in memory design, verification, validation, and integration.
• Bachelor’s degree in electrical engineering or a related field.
• Strong knowledge of custom high-speed, low-power memory and FPGA configuration memory design.
• Expertise in high-performance and low-power design techniques.
• Familiarity with variation-aware design in advanced semiconductor technologies.
• Strong problem-solving, communication, and collaboration skills.

Nice to have

• Master’s degree or PhD.
• Experience designing high-density memory cells for high yield.
• Knowledge of semiconductor device fundamentals.

Culture & Benefits

• Full-time role within an international engineering and manufacturing organization.
• Results-oriented, collaborative, team-first work environment.
• Comprehensive compensation and benefits program.
• Background and reference checks are required.