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3 часа назад

Staff Engineer, Serdes Analog Design (Serdes)

157 000 - 243 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Staff Engineer, Serdes Analog Design (Serdes): Designing high-speed, low-power Serdes transceiver architectures and analog/custom digital circuits for display, camera, UCIe, die-to-die, UA-link, and Ethernet interfaces with an accent on advanced CMOS processes, circuit simulation, layout optimization, and silicon validation. Focus on building CTLE, DFE, FFE, clock distribution, PLL, and mixed-signal components while solving power, performance, functionality, and reliability challenges.

Location: Daily onsite presence at the San Jose, California headquarters, United States

Salary: $157,000–$243,000 USD base pay range, with additional incentive opportunities.

Company

hirify.global develops memory, system LSI, LCD, 5G, SoC, and display technologies for applications including smartphones, electric vehicles, data centers, and IoT devices.

What you will do

  • Develop architectures and circuits for high-speed Serdes transceivers, clock generation, and traditional analog circuits.
  • Design low-power, low-voltage analog and custom digital components using advanced CMOS process technologies.
  • Translate component specifications into schematics and build simulation test benches for performance, functionality, power, and reliability evaluation.
  • Supervise layout designers and deliver LVS/DRC-clean layouts optimized for circuit performance and power consumption.
  • Validate circuit functionality and performance in silicon.
  • Collaborate on Serdes solutions for display, camera sensor, UCIe/die-to-die, 224/448Gbps UA-link, and Ethernet interfaces.

Requirements

  • Bachelor’s degree with 10+ years, master’s degree with 8+ years, or PhD with 5+ years of experience.
  • At least 2 years of RF, analog, or Serdes SoC design experience.
  • Experience with analog and mixed-signal circuits, including bandgaps, LDOs, and filters.
  • Experience with Serdes IP circuits such as CTLE, DFE, FFE, clock distributions, PI, and IQ generation.
  • Knowledge of Serdes architecture and high-speed interconnect standards including USB, PCIe, and UCIe.
  • Proficiency with EDA tools such as Cadence, Spectre, Totem, and EMX, plus scripting with Python or Matlab.

Nice to have

  • Knowledge and experience with ESD, PLL, clock generation, ADC, or DAC design.

Culture & Benefits

  • Inclusive and diverse work environment focused on collaboration, learning, and growth.
  • Medical, dental, vision, and 401(k) benefits.
  • 4+ weeks of paid time off annually, plus holidays and sick leave.
  • Family support programs, emotional wellness resources, charitable giving match, and fitness facilities.
  • Flexible work environment aligned with the role’s daily onsite requirement.

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