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2 дня назад

Lead Software Engineer (C++)

114 800 - 213 200$
Тип работы
fulltime
Грейд
lead
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Lead Software Engineer (C++/Electronic Design Automation): Developing timing and power optimization algorithms for Cadence’s Innovus Place & Route product with an accent on electronic design automation, physical synthesis, and timing closure. Focus on designing multithreaded and distributed optimization solutions, applying advanced data structures and algorithms, and improving chip performance and power consumption.

Location: San Jose, California, United States

Annual salary: $114,800–$213,200 in California, plus potential bonus, equity, and benefits.

Company

hirify.global develops electronic design automation products, including Innovus Place & Route, for semiconductor and chip manufacturing companies.

What you will do

  • Develop timing and power optimization capabilities for the Innovus Place & Route product.
  • Improve timing closure flows that determine chip performance and power consumption.
  • Design and implement multithreaded and distributed optimization solutions.
  • Apply data structures, algorithms, and software engineering practices to solve complex optimization problems.
  • Collaborate with customers and contribute to advances in electronic design automation technology.

Requirements

  • Strong problem-solving skills and a highly technical engineering background.
  • Professional C/C++ development experience in a Linux environment.
  • Strong understanding and extensive practical use of data structures and algorithms.
  • Excellent communication skills and willingness to work with customers.
  • MS degree or equivalent academic background in Electrical Engineering or Computer Science.
  • Experience with multithreading, timing analysis, or physical synthesis algorithms.

Nice to have

  • R&D experience with IC physical design tools.
  • Hands-on experience using physical design tools for design closure and familiarity with physical design flows.
  • Experience with Tcl or other scripting languages.
  • Ph.D. track in Electrical Engineering or Computer Science.

Culture & Benefits

  • Paid vacation and paid holidays.
  • 401(k) plan with employer match.
  • Employee stock purchase plan.
  • Medical, dental, and vision plan options.
  • Potential incentive compensation, including bonus and equity.

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