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Junior Engineer Tapeout Systems/Tapeout Operations (Semiconductor)

Формат работы
onsite
Тип работы
fulltime
Грейд
junior
Английский
c1
Страна
Germany
Релокация
Germany
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Junior Engineer Tapeout Systems/Tapeout Operations (Semiconductor): Designing and supporting tapeout systems that convert physical integrated-circuit designs into photomask data, with an accent on design rule checks, mask data preparation, and cross-functional tapeout coordination. Focus on troubleshooting technical issues, improving workflows and cycle times, and developing scripting-based operational processes in a semiconductor manufacturing environment.

Location: Dresden, Saxony, Germany; onsite role. Occasional travel may be required. Relocation assistance to Dresden is available.

Company

hirify.global is a global semiconductor manufacturer providing integrated-circuit process technology, design, development, and manufacturing services.

What you will do

  • Contribute to the design and development of tapeout systems that convert physical designs into photomask data.
  • Support daily tapeout operations, including design rule checks, data preparation, and coordination across global teams.
  • Coordinate with fabs, OPC teams, Tapeout Logistics, and Tapeout Integration groups to support accurate and timely tapeouts to RTM.
  • Identify workflow improvements that increase efficiency, reduce costs, and shorten cycle times.
  • Troubleshoot technical issues, support multiple projects, and apply analytical problem-solving skills.
  • Create and maintain documentation, best practices, training materials, and process risk-mitigation documentation while supporting EHS&S programs.

Requirements

  • Bachelor’s or Master’s degree in electrical engineering, computer science, physics, chemistry, or a related field, or multiple years of relevant semiconductor experience.
  • Knowledge of integrated-circuit design and manufacturing in submicron technologies.
  • Knowledge of EDA tools for physical layout design and verification, including Calibre DRC/LVS and Cadence Virtuoso.
  • First experience with scripting languages such as TCL, Python, Perl, or shell scripting.
  • Linux user with the ability to operate in a UNIX environment.
  • Proficiency in Microsoft Excel, Word, and PowerPoint.
  • Fluent spoken and written English at least at C1 level.
  • Flexibility, ability to work as a team player, and motivation to contribute as an individual contributor.

Nice to have

  • Knowledge of the photomask-making process.
  • Familiarity with product layouts, KERF or FRAME design, and EDA tools such as Cadence Virtuoso and Mentor Calibre.
  • Experience with Structured Problem Solving (SPS).
  • Technical program management skills.

Culture & Benefits

  • Open-ended full-time position with an attractive compensation package including a 13th-month salary and bonus payments.
  • Flexible working arrangements, including family-friendly part-time models, trust-based flextime, and salary conversion into free time.
  • Internal qualification opportunities, support for external educational qualifications, and career development paths.
  • On-site gym, beach volleyball court, bike leasing, and subsidized employee restaurant.
  • First-name culture, cooperation at eye level, team-event budget, and social engagement through GlobalGives.

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