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10 часов назад

Senior Semiconductor Product Engineer (Semiconductor)

85 000 - 121 400$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Senior Semiconductor Product Engineer (High Power Laser): Overseeing new chip product introduction, production ramp, yield sustaining, and improvement in foundries with an accent on semiconductor device physics, statistical analysis, and process-to-product correlation. Focus on solving yield excursions, reducing product cost, supporting failure analysis, and coordinating quality improvements across R&D, foundries, and contract manufacturers.

Location: USA - CA - San Jose (Rose), Rose Orchard Fab; on-site presence required

Salary: $85,000–$121,400 per year

Company

hirify.global develops high-power laser products and semiconductor technologies.

What you will do

  • Oversee new chip product introduction, production ramp, yield sustaining, and improvement in foundries.
  • Drive yield improvement and product cost reduction from fabrication through final test.
  • Perform statistical data analysis and troubleshoot root causes of yield excursions.
  • Correlate process and product parameters to understand margins and drive improvements.
  • Monitor foundry operations to meet quality and delivery goals.
  • Support material disposition, failure analysis, RMA investigations, and closure of quality cases in coordination with R&D, process integration, and contract manufacturers.

Requirements

  • MS or PhD in electrical engineering, materials science, applied physics, or a related field.
  • Deep understanding of semiconductor device processes and physics.
  • Strong statistical data analysis skills and experience with tools such as JMP or Minitab.
  • 0–3 years of hands-on experience in device design, wafer processing, device assembly, and testing for optoelectronic or semiconductor devices.
  • Familiarity with foundry operating models and semiconductor device failure analysis tools.
  • Must be based in the San Jose Rose Orchard Fab location.

Nice to have

  • Knowledge of III-V epitaxial design and growth.
  • Experience with VCSEL or EEL devices.

Culture & Benefits

  • Competitive total compensation package.
  • Potential annual bonus, equity, and health and welfare benefits.
  • Customer-focused environment with an emphasis on quality and delivery.

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