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11 часов назад

Physical Design Student (VLSI)

Формат работы
hybrid
Тип работы
fulltime
Грейд
trainee
Английский
c1
Страна
Israel
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Physical Design Student (VLSI): Supporting the physical implementation of advanced semiconductor chips, including synthesis, floorplanning, Place & Route, Clock-Tree Synthesis, and signoff checks, with an accent on deep-submicron design and backend methodologies. Focus on developing automation scripts, validating design integrity through STA, DRC/LVS, EMIR, and LEC, and collaborating across Architecture, Design, and DFT teams.

Location: Tel Aviv-Yafo, Israel; at least 2 days per week onsite at the Haifa/Tel Aviv Center

Company

hirify.global develops semiconductor-based connectivity solutions and software for rack-scale AI infrastructure, integrating technologies such as CXL, Ethernet, NVLink, PCIe, and UALink.

What you will do

  • Support physical implementation flows including synthesis, floorplanning, Place & Route, and Clock-Tree Synthesis.
  • Assist with macro-level implementation and complex layout routing.
  • Run and support signoff checks including Static Timing Analysis, DRC/LVS, EMIR reliability analysis, and Logic Equivalence Checking.
  • Develop scripting tools to automate repetitive engineering tasks and improve the design environment.
  • Collaborate with Architecture, Design, and DFT teams on backend methodologies and chip design integration.

Requirements

  • Pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • Strong academic foundation in digital systems, VLSI design, or semiconductor devices.
  • Familiarity with Python, TCL, Bash, or Perl.
  • Fluent Hebrew and English required.
  • Ability to work at least 2 days per week at the Haifa/Tel Aviv Center.

Nice to have

  • Previous VLSI or hardware student experience, or a significant academic project in physical design or VLSI.
  • University lab experience with industry-standard EDA tools such as Synopsys Fusion Compiler, ICC2, or Cadence Innovus.
  • Understanding of STA, DRC, and LVS verification concepts.
  • Proactive approach, fast learning ability, and interest in deep-tech hardware infrastructure.

Culture & Benefits

  • Work alongside senior semiconductor engineering professionals through close mentorship.
  • Gain hands-on experience with backend execution and advanced methodologies for AI infrastructure chips.
  • Participate in technical reviews and discussions within a newly established Israel R&D center.
  • A diverse and inclusive workplace encourages applications from people with varied backgrounds and experiences.

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